changeset 433182bf55c1 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=433182bf55c1
description:
CPU: Make the highest order bit in the micro pc determine if it's
combinational or from the ROM.
diffstat:
2 files changed, 11 insertions(+), 2 deletions(-)
src/cpu/simple/base.cc | 3 +--
src/cpu/static_inst.hh | 10 ++++++++++
diffs (98 lines):
diff -r 3b3756efad89 -r 433182bf55c1 src/cpu/simple/base.cc
--- a/src/cpu/simple/base.cc Sun Oct 12 15:59:21 2008 -0700
+++ b/src/cpu/simple/base.cc Sun Oct 12 16:59:55 2008 -0700
@@ -368,9 +368,13 @@
// decode the instruction
inst = gtoh(inst);
- //If we're not in the middle of a macro instruction
- if (!curMacroStaticInst) {
+ MicroPC upc = thread->readMicroPC();
+ if (isRomMicroPC(upc)) {
+ stayAtPC = false;
+ curStaticInst = microcodeRom.fetchMicroop(upc, curMacroStaticInst);
+ } else if (!curMacroStaticInst) {
+ //We're not in the middle of a macro instruction
StaticInstPtr instPtr = NULL;
//Predecode, ie bundle up an ExtMachInst
@@ -401,15 +405,13 @@
//out micro ops
if (instPtr && instPtr->isMacroop()) {
curMacroStaticInst = instPtr;
- curStaticInst = curMacroStaticInst->
- fetchMicroop(thread->readMicroPC());
+ curStaticInst = curMacroStaticInst->fetchMicroop(upc);
} else {
curStaticInst = instPtr;
}
} else {
//Read the next micro op from the macro op
- curStaticInst = curMacroStaticInst->
- fetchMicroop(thread->readMicroPC());
+ curStaticInst = curMacroStaticInst->fetchMicroop(upc);
}
//If we decoded an instruction this "tick", record information about it.
@@ -469,22 +471,23 @@
if (fault != NoFault) {
curMacroStaticInst = StaticInst::nullStaticInstPtr;
predecoder.reset();
- thread->setMicroPC(0);
- thread->setNextMicroPC(1);
+ thread->setMicroPC(normalMicroPC(0));
+ thread->setNextMicroPC(normalMicroPC(1));
fault->invoke(tc);
} else {
//If we're at the last micro op for this instruction
if (curStaticInst && curStaticInst->isLastMicroop()) {
- //We should be working with a macro op
- assert(curMacroStaticInst);
+ //We should be working with a macro op or be in the ROM
+ assert(curMacroStaticInst ||
+ isRomMicroPC(thread->readMicroPC()));
//Close out this macro op, and clean up the
//microcode state
curMacroStaticInst = StaticInst::nullStaticInstPtr;
- thread->setMicroPC(0);
- thread->setNextMicroPC(1);
+ thread->setMicroPC(normalMicroPC(0));
+ thread->setNextMicroPC(normalMicroPC(1));
}
//If we're still in a macro op
- if (curMacroStaticInst) {
+ if (curMacroStaticInst || isRomMicroPC(thread->readMicroPC())) {
//Advance the micro pc
thread->setMicroPC(thread->readNextMicroPC());
//Advance the "next" micro pc. Note that there are no delay
diff -r 3b3756efad89 -r 433182bf55c1 src/cpu/static_inst.hh
--- a/src/cpu/static_inst.hh Sun Oct 12 15:59:21 2008 -0700
+++ b/src/cpu/static_inst.hh Sun Oct 12 16:59:55 2008 -0700
@@ -73,6 +73,26 @@
}
typedef uint32_t MicroPC;
+
+static const MicroPC MicroPCRomBit = 1 << (sizeof(MicroPC) * 8 - 1);
+
+static inline MicroPC
+romMicroPC(MicroPC upc)
+{
+ return upc | MicroPCRomBit;
+}
+
+static inline MicroPC
+normalMicroPC(MicroPC upc)
+{
+ return upc & ~MicroPCRomBit;
+}
+
+static inline bool
+isRomMicroPC(MicroPC upc)
+{
+ return MicroPCRomBit & upc;
+}
/**
* Base, ISA-independent static instruction class.
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