changeset df9253dd6b4d in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=df9253dd6b4d
description:
Fix a few more places where the context stuff wasn't changed
diffstat:
0 files changed
diffs (24 lines):
diff -r c9056088f151 -r df9253dd6b4d src/arch/sparc/ua2005.cc
--- a/src/arch/sparc/ua2005.cc Wed Nov 05 16:19:17 2008 -0500
+++ b/src/arch/sparc/ua2005.cc Wed Nov 05 07:20:03 2008 -0800
@@ -257,7 +257,7 @@
temp = readRegNoEffect(miscReg) & (STS::active | STS::speculative);
// Check that the CPU array is fully populated
// (by calling getNumCPus())
- assert(sys->getNumContexts() > tc->contextId());
+ assert(sys->numContexts() > tc->contextId());
temp |= tc->contextId() << STS::shft_id;
diff -r c9056088f151 -r df9253dd6b4d src/dev/x86/i82094aa.cc
--- a/src/dev/x86/i82094aa.cc Wed Nov 05 16:19:17 2008 -0500
+++ b/src/dev/x86/i82094aa.cc Wed Nov 05 07:20:03 2008 -0800
@@ -39,7 +39,7 @@
latency(p->pio_latency), pioAddr(p->pio_addr), extIntPic(NULL)
{
// This assumes there's only one I/O APIC in the system
- id = sys->getNumCPUs();
+ id = sys->numContexts();
assert(id <= 0xf);
arbId = id;
regSel = 0;
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