changeset 1444787b1c93 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=1444787b1c93
description:
IGbE: Remove is8257 variable
diffstat:
1 file changed, 1 insertion(+), 4 deletions(-)
src/dev/i8254xGBe.cc | 5 +----
diffs (60 lines):
diff -r 50c9d48de3ca -r 1444787b1c93 src/dev/Ethernet.py
--- a/src/dev/Ethernet.py Wed Dec 17 09:51:18 2008 -0800
+++ b/src/dev/Ethernet.py Tue Jan 06 10:36:55 2009 -0500
@@ -69,7 +69,6 @@
class IGbE(EtherDevice):
# Base class for two IGbE adapters listed above
type = 'IGbE'
- #abstract = True
hardware_address = Param.EthernetAddr(NextEthernetAddr,
"Ethernet Hardware Address")
use_flow_control = Param.Bool(False,
@@ -105,20 +104,22 @@
wb_comp_delay = Param.Latency('10ns', "delay after desc wb occurs")
tx_read_delay = Param.Latency('0ns', "delay after tx dma read")
rx_write_delay = Param.Latency('0ns', "delay after rx dma read")
- is8257 = Param.Bool("Select between and 8254x and 8257x device")
-
+ phy_pid = Param.UInt16("Phy PID that corresponds to device ID")
+ phy_epid = Param.UInt16("Phy EPID that corresponds to device ID")
class IGbE_e1000(IGbE):
# Older Intel 8254x based gigabit ethernet adapter
# Uses Intel e1000 driver
DeviceID = 0x1075
- is8257 = False
+ phy_pid = 0x02A8
+ phy_epid = 0x0380
class IGbE_igb(IGbE):
# Newer Intel 8257x based gigabit ethernet adapter
# Uses Intel igb driver and in theory supports packet splitting and LRO
DeviceID = 0x10C9
- is8257 = True
+ phy_pid = 0x0141
+ phy_epid = 0x0CC0
class EtherDevBase(EtherDevice):
type = 'EtherDevBase'
diff -r 50c9d48de3ca -r 1444787b1c93 src/dev/i8254xGBe.cc
--- a/src/dev/i8254xGBe.cc Wed Dec 17 09:51:18 2008 -0800
+++ b/src/dev/i8254xGBe.cc Tue Jan 06 10:36:55 2009 -0500
@@ -446,16 +446,10 @@
regs.mdic.data(0x796D); // link up
break;
case PHY_PID:
- if (params()->is8257)
- regs.mdic.data(0x0141);
- else
- regs.mdic.data(0x02A8);
+ regs.mdic.data(params()->phy_pid);
break;
case PHY_EPID:
- if (params()->is8257)
- regs.mdic.data(0x0CC0);
- else
- regs.mdic.data(0x0380);
+ regs.mdic.data(params()->phy_epid);
break;
case PHY_GSTATUS:
regs.mdic.data(0x7C00);
_______________________________________________
m5-dev mailing list
[email protected]
http://m5sim.org/mailman/listinfo/m5-dev