changeset ac2c268bf4f1 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=ac2c268bf4f1
description:
X86: Rework interrupt pins to allow one to many connections.
diffstat:
16 files changed, 209 insertions(+), 70 deletions(-)
src/dev/x86/Cmos.py | 4 +
src/dev/x86/I82094AA.py | 5 +-
src/dev/x86/I8254.py | 4 +
src/dev/x86/I8259.py | 8 ++-
src/dev/x86/SouthBridge.py | 21 +++++++--
src/dev/x86/X86IntPin.py | 24 ++++++++---
src/dev/x86/cmos.cc | 4 +
src/dev/x86/cmos.hh | 6 +-
src/dev/x86/i82094aa.cc | 20 ++++++++-
src/dev/x86/i82094aa.hh | 9 +---
src/dev/x86/i8254.cc | 7 ++-
src/dev/x86/i8254.hh | 4 -
src/dev/x86/i8259.cc | 38 +++++++++++------
src/dev/x86/i8259.hh | 11 +----
src/dev/x86/intdev.cc | 18 ++++++--
src/dev/x86/intdev.hh | 96 ++++++++++++++++++++++++++++++++++++--------
diffs (truncated from 575 to 300 lines):
diff -r e0d0e58cfd8d -r ac2c268bf4f1 src/dev/x86/Cmos.py
--- a/src/dev/x86/Cmos.py Sat Jan 31 23:26:43 2009 -0800
+++ b/src/dev/x86/Cmos.py Sat Jan 31 23:33:54 2009 -0800
@@ -29,6 +29,7 @@
from m5.params import *
from m5.proxy import *
from Device import BasicPioDevice
+from X86IntPin import X86IntSourcePin
class Cmos(BasicPioDevice):
type = 'Cmos'
@@ -36,4 +37,5 @@
time = Param.Time('01/01/2009',
"System time to use ('Now' for actual time)")
pio_latency = Param.Latency('1ns', "Programmed IO latency in simticks")
- int_pin = Param.X86IntPin('Pin to signal RTC alarm interrupts to')
+ int_pin = Param.X86IntSourcePin(X86IntSourcePin(),
+ 'Pin to signal RTC alarm interrupts to')
diff -r e0d0e58cfd8d -r ac2c268bf4f1 src/dev/x86/I82094AA.py
--- a/src/dev/x86/I82094AA.py Sat Jan 31 23:26:43 2009 -0800
+++ b/src/dev/x86/I82094AA.py Sat Jan 31 23:33:54 2009 -0800
@@ -29,7 +29,7 @@
from m5.params import *
from m5.proxy import *
from Device import BasicPioDevice
-from X86IntPin import X86IntPin
+from X86IntPin import X86IntSinkPin
class I82094AA(BasicPioDevice):
type = 'I82094AA'
@@ -37,6 +37,7 @@
pio_latency = Param.Latency('1ns', "Programmed IO latency in simticks")
pio_addr = Param.Addr("Device address")
int_port = Port("Port for sending and receiving interrupt messages")
+ external_int_pic = Param.I8259("External PIC, if any")
def pin(self, line):
- return X86IntPin(device=self, line=line)
+ return X86IntSinkPin(device=self, number=line)
diff -r e0d0e58cfd8d -r ac2c268bf4f1 src/dev/x86/I8254.py
--- a/src/dev/x86/I8254.py Sat Jan 31 23:26:43 2009 -0800
+++ b/src/dev/x86/I8254.py Sat Jan 31 23:33:54 2009 -0800
@@ -29,9 +29,11 @@
from m5.params import *
from m5.proxy import *
from Device import BasicPioDevice
+from X86IntPin import X86IntSourcePin
class I8254(BasicPioDevice):
type = 'I8254'
cxx_class = 'X86ISA::I8254'
pio_latency = Param.Latency('1ns', "Programmed IO latency in simticks")
- int_pin = Param.X86IntPin('Pin to signal timer interrupts to')
+ int_pin = Param.X86IntSourcePin(X86IntSourcePin(),
+ 'Pin to signal timer interrupts to')
diff -r e0d0e58cfd8d -r ac2c268bf4f1 src/dev/x86/I8259.py
--- a/src/dev/x86/I8259.py Sat Jan 31 23:26:43 2009 -0800
+++ b/src/dev/x86/I8259.py Sat Jan 31 23:33:54 2009 -0800
@@ -29,7 +29,7 @@
from m5.params import *
from m5.proxy import *
from Device import BasicPioDevice
-from X86IntPin import X86IntPin
+from X86IntPin import X86IntSourcePin, X86IntSinkPin
class X86I8259CascadeMode(Enum):
map = {'I8259Master' : 0,
@@ -41,8 +41,10 @@
type = 'I8259'
cxx_class='X86ISA::I8259'
pio_latency = Param.Latency('1ns', "Programmed IO latency in simticks")
- output = Param.X86IntPin('The pin this I8259 drives')
+ output = Param.X86IntSourcePin(X86IntSourcePin(),
+ 'The pin this I8259 drives')
mode = Param.X86I8259CascadeMode('How this I8259 is cascaded')
+ slave = Param.I8259('Slave I8259, if any')
def pin(self, line):
- return X86IntPin(device=self, line=line)
+ return X86IntSinkPin(device=self, number=line)
diff -r e0d0e58cfd8d -r ac2c268bf4f1 src/dev/x86/SouthBridge.py
--- a/src/dev/x86/SouthBridge.py Sat Jan 31 23:26:43 2009 -0800
+++ b/src/dev/x86/SouthBridge.py Sat Jan 31 23:33:54 2009 -0800
@@ -34,6 +34,7 @@
from I8254 import I8254
from I8259 import I8259
from PcSpeaker import PcSpeaker
+from X86IntPin import X86IntLine
from m5.SimObject import SimObject
def x86IOAddress(port):
@@ -52,6 +53,9 @@
_pit = I8254(pio_addr=x86IOAddress(0x40))
_speaker = PcSpeaker(pio_addr=x86IOAddress(0x61))
_io_apic = I82094AA(pio_addr=0xFEC00000)
+ # This is to make sure the interrupt lines are instantiated. Don't use
+ # it for anything directly.
+ int_lines = VectorParam.X86IntLine([], "Interrupt lines")
pic1 = Param.I8259(_pic1, "Master PIC")
pic2 = Param.I8259(_pic2, "Slave PIC")
@@ -61,13 +65,20 @@
speaker = Param.PcSpeaker(_speaker, "PC speaker")
io_apic = Param.I82094AA(_io_apic, "I/O APIC")
+ def connectPins(self, source, sink):
+ self.int_lines.append(X86IntLine(source=source, sink=sink))
+
def attachIO(self, bus):
- # Make internal connections
- self.pic1.output = self.io_apic.pin(0)
- self.pic2.output = self.pic1.pin(2)
- self.cmos.int_pin = self.pic2.pin(0)
- self.pit.int_pin = self.pic1.pin(0)
+ # Route interupt signals
+ self.connectPins(self.pic1.output, self.io_apic.pin(0))
+ self.connectPins(self.pic2.output, self.pic1.pin(2))
+ self.connectPins(self.cmos.int_pin, self.pic2.pin(0))
+ self.connectPins(self.pit.int_pin, self.pic1.pin(0))
+ self.connectPins(self.pit.int_pin, self.io_apic.pin(2))
+ # Tell the devices about each other
+ self.pic1.slave = self.pic2
self.speaker.i8254 = self.pit
+ self.io_apic.external_int_pic = self.pic1
# Connect to the bus
self.cmos.pio = bus.port
self.dma1.pio = bus.port
diff -r e0d0e58cfd8d -r ac2c268bf4f1 src/dev/x86/X86IntPin.py
--- a/src/dev/x86/X86IntPin.py Sat Jan 31 23:26:43 2009 -0800
+++ b/src/dev/x86/X86IntPin.py Sat Jan 31 23:33:54 2009 -0800
@@ -29,9 +29,23 @@
from m5.params import *
from m5.SimObject import SimObject
-class X86IntPin(SimObject):
- type = 'X86IntPin'
- cxx_class = 'X86ISA::IntPin'
+# A generic pin to drive an interrupt signal generated by a device.
+class X86IntSourcePin(SimObject):
+ type = 'X86IntSourcePin'
+ cxx_class = 'X86ISA::IntSourcePin'
- line = Param.Int("Interrupt line for this pin")
- device = Param.SimObject("Device which handles interrupts")
+# A generic pin to receive an interrupt signal generated by another device.
+class X86IntSinkPin(SimObject):
+ type = 'X86IntSinkPin'
+ cxx_class = 'X86ISA::IntSinkPin'
+
+ device = Param.SimObject("Device this pin belongs to")
+ number = Param.Int("The pin number on the device")
+
+# An interrupt line which is driven by a source pin and drives a sink pin.
+class X86IntLine(SimObject):
+ type = 'X86IntLine'
+ cxx_class = 'X86ISA::IntLine'
+
+ source = Param.X86IntSourcePin("Pin driving this line")
+ sink = Param.X86IntSinkPin("Pin driven by this line")
diff -r e0d0e58cfd8d -r ac2c268bf4f1 src/dev/x86/cmos.cc
--- a/src/dev/x86/cmos.cc Sat Jan 31 23:26:43 2009 -0800
+++ b/src/dev/x86/cmos.cc Sat Jan 31 23:33:54 2009 -0800
@@ -36,7 +36,9 @@
X86ISA::Cmos::X86RTC::handleEvent()
{
assert(intPin);
- intPin->signalInterrupt();
+ intPin->raise();
+ //XXX This is a hack.
+ intPin->lower();
}
Tick
diff -r e0d0e58cfd8d -r ac2c268bf4f1 src/dev/x86/cmos.hh
--- a/src/dev/x86/cmos.hh Sat Jan 31 23:26:43 2009 -0800
+++ b/src/dev/x86/cmos.hh Sat Jan 31 23:33:54 2009 -0800
@@ -38,7 +38,7 @@
namespace X86ISA
{
-class IntPin;
+class IntSourcePin;
class Cmos : public BasicPioDevice
{
@@ -57,10 +57,10 @@
class X86RTC : public MC146818
{
protected:
- IntPin * intPin;
+ IntSourcePin * intPin;
public:
X86RTC(EventManager *em, const std::string &n, const struct tm time,
- bool bcd, Tick frequency, IntPin * _intPin) :
+ bool bcd, Tick frequency, IntSourcePin * _intPin) :
MC146818(em, n, time, bcd, frequency), intPin(_intPin)
{
}
diff -r e0d0e58cfd8d -r ac2c268bf4f1 src/dev/x86/i82094aa.cc
--- a/src/dev/x86/i82094aa.cc Sat Jan 31 23:26:43 2009 -0800
+++ b/src/dev/x86/i82094aa.cc Sat Jan 31 23:33:54 2009 -0800
@@ -36,7 +36,8 @@
#include "sim/system.hh"
X86ISA::I82094AA::I82094AA(Params *p) : PioDevice(p), IntDev(this),
- latency(p->pio_latency), pioAddr(p->pio_addr), extIntPic(NULL)
+ latency(p->pio_latency), pioAddr(p->pio_addr),
+ extIntPic(p->external_int_pic)
{
// This assumes there's only one I/O APIC in the system
id = sys->numContexts();
@@ -47,6 +48,7 @@
entry.mask = 1;
for (int i = 0; i < TableSize; i++) {
redirTable[i] = entry;
+ pinStates[i] = false;
}
}
@@ -209,6 +211,22 @@
}
}
+void
+X86ISA::I82094AA::raiseInterruptPin(int number)
+{
+ assert(number < TableSize);
+ if (!pinStates[number])
+ signalInterrupt(number);
+ pinStates[number] = true;
+}
+
+void
+X86ISA::I82094AA::lowerInterruptPin(int number)
+{
+ assert(number < TableSize);
+ pinStates[number] = false;
+}
+
X86ISA::I82094AA *
I82094AAParams::create()
{
diff -r e0d0e58cfd8d -r ac2c268bf4f1 src/dev/x86/i82094aa.hh
--- a/src/dev/x86/i82094aa.hh Sat Jan 31 23:26:43 2009 -0800
+++ b/src/dev/x86/i82094aa.hh Sat Jan 31 23:33:54 2009 -0800
@@ -77,6 +77,7 @@
static const uint8_t APICVersion = 0x14;
RedirTableEntry redirTable[TableSize];
+ bool pinStates[TableSize];
public:
typedef I82094AAParams Params;
@@ -89,12 +90,6 @@
I82094AA(Params *p);
- void
- setExtIntPic(I8259 * pic)
- {
- extIntPic = pic;
- }
-
Tick read(PacketPtr pkt);
Tick write(PacketPtr pkt);
@@ -123,6 +118,8 @@
}
void signalInterrupt(int line);
+ void raiseInterruptPin(int number);
+ void lowerInterruptPin(int number);
};
}; // namespace X86ISA
diff -r e0d0e58cfd8d -r ac2c268bf4f1 src/dev/x86/i8254.cc
--- a/src/dev/x86/i8254.cc Sat Jan 31 23:26:43 2009 -0800
+++ b/src/dev/x86/i8254.cc Sat Jan 31 23:33:54 2009 -0800
@@ -37,8 +37,11 @@
X86ISA::I8254::counterInterrupt(unsigned int num)
{
DPRINTF(I8254, "Interrupt from counter %d.\n", num);
- if (num == 0)
- intPin->signalInterrupt();
+ if (num == 0) {
+ intPin->raise();
+ //XXX This is a hack.
+ intPin->lower();
+ }
}
Tick
diff -r e0d0e58cfd8d -r ac2c268bf4f1 src/dev/x86/i8254.hh
--- a/src/dev/x86/i8254.hh Sat Jan 31 23:26:43 2009 -0800
+++ b/src/dev/x86/i8254.hh Sat Jan 31 23:33:54 2009 -0800
@@ -38,7 +38,7 @@
namespace X86ISA
{
-class IntPin;
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