changeset 4b6af0ca4565 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=4b6af0ca4565
description:
X86: Make sure the predecoder is cleared out for interrupts.
diffstat:
1 file changed, 1 insertion(+)
src/cpu/simple/base.cc | 1 +
diffs (11 lines):
diff -r b9e30a60dee4 -r 4b6af0ca4565 src/cpu/simple/base.cc
--- a/src/cpu/simple/base.cc Sun Feb 01 00:02:21 2009 -0800
+++ b/src/cpu/simple/base.cc Sun Feb 01 00:04:34 2009 -0800
@@ -321,6 +321,7 @@
Fault interrupt = interrupts->getInterrupt(tc);
if (interrupt != NoFault) {
+ predecoder.reset();
interrupts->updateIntrInfo(tc);
interrupt->invoke(tc);
}
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