changeset d4e54239ed37 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=d4e54239ed37
description:
X86: Distinguish between hardware and software interrupts/exceptions
diffstat:
2 files changed, 5 insertions(+), 3 deletions(-)
src/arch/x86/isa/microasm.isa | 2 +-
src/arch/x86/isa/microops/regop.isa | 6 ++++--
diffs (39 lines):
diff -r f58bee925c28 -r d4e54239ed37 src/arch/x86/isa/microasm.isa
--- a/src/arch/x86/isa/microasm.isa Sun Feb 01 17:06:25 2009 -0800
+++ b/src/arch/x86/isa/microasm.isa Sun Feb 01 17:07:18 2009 -0800
@@ -86,7 +86,7 @@
# Add in symbols for the various checks of segment selectors.
for check in ("NoCheck", "CSCheck", "CallGateCheck", "IntGateCheck",
- "SSCheck", "IretCheck", "IntCSCheck"):
+ "SoftIntGateCheck", "SSCheck", "IretCheck", "IntCSCheck"):
assembler.symbols[check] = "Seg%s" % check
for reg in ("TR", "IDTR"):
diff -r f58bee925c28 -r d4e54239ed37 src/arch/x86/isa/microops/regop.isa
--- a/src/arch/x86/isa/microops/regop.isa Sun Feb 01 17:06:25 2009 -0800
+++ b/src/arch/x86/isa/microops/regop.isa Sun Feb 01 17:07:18 2009 -0800
@@ -234,7 +234,7 @@
enum SegmentSelectorCheck {
SegNoCheck, SegCSCheck, SegCallGateCheck, SegIntGateCheck,
- SegSSCheck, SegIretCheck, SegIntCSCheck
+ SegSoftIntGateCheck, SegSSCheck, SegIretCheck, SegIntCSCheck
};
enum LongModeDescriptorType {
@@ -1066,11 +1066,13 @@
panic("CS checks for far calls/jumps through call gates"
"not implemented.\\n");
break;
- case SegIntGateCheck:
+ case SegSoftIntGateCheck:
// Check permissions.
if (desc.dpl < m5reg.cpl) {
fault = new GeneralProtection((uint16_t)selector);
}
+ // Fall through on purpose
+ case SegIntGateCheck:
// Make sure the gate's the right type.
if (m5reg.mode == LongMode && ((desc.type & 0xe) != 0xe) ||
((desc.type & 0x6) != 0x6)) {
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