"hidden inside of or" => "hidden inside of the cpu or"
Gabe Black wrote: > I've getting close to emptying my queue. I'm up to where I added a hack > for page faults. When we last left that discussion, we were talking > about how to connect the TLB so that it could delay responding and > whether it would be a good idea to use ports for something like that. If > it is ports, then the question is whether that's hidden inside of or > exposed to the memory system. There were concerns about the performance > penalty having the extra layer might cause. Should it use ports? Should > it be inside or outside of the CPU SimObject? > > Gabe > > Gabe Black wrote: > >> changeset 8cd8e1393990 in /z/repo/m5 >> details: http://repo.m5sim.org/m5?cmd=changeset;node=8cd8e1393990 >> description: >> X86: Make the fault classes handle error codes better. >> >> diffstat: >> >> 3 files changed, 46 insertions(+), 23 deletions(-) >> src/arch/x86/faults.cc | 4 +- >> src/arch/x86/faults.hh | 54 >> ++++++++++++++++++++++++----------- >> src/arch/x86/isa/microops/regop.isa | 11 +++---- >> >> diffs (202 lines): >> >> diff -r f770af5600c9 -r 8cd8e1393990 src/arch/x86/faults.cc >> --- a/src/arch/x86/faults.cc Sun Feb 01 17:07:43 2009 -0800 >> +++ b/src/arch/x86/faults.cc Sun Feb 01 17:08:32 2009 -0800 >> @@ -123,7 +123,9 @@ >> } >> tc->setIntReg(INTREG_MICRO(1), vector); >> tc->setIntReg(INTREG_MICRO(7), tc->readPC()); >> - tc->setIntReg(INTREG_MICRO(15), (uint64_t)(-1)); >> + if (errorCode != (uint64_t)(-1)) { >> + tc->setIntReg(INTREG_MICRO(15), errorCode); >> + } >> tc->setMicroPC(romMicroPC(entry)); >> tc->setNextMicroPC(romMicroPC(entry) + 1); >> } >> diff -r f770af5600c9 -r 8cd8e1393990 src/arch/x86/faults.hh >> --- a/src/arch/x86/faults.hh Sun Feb 01 17:07:43 2009 -0800 >> +++ b/src/arch/x86/faults.hh Sun Feb 01 17:08:32 2009 -0800 >> @@ -58,6 +58,7 @@ >> #ifndef __ARCH_X86_FAULTS_HH__ >> #define __ARCH_X86_FAULTS_HH__ >> >> +#include "base/bitunion.hh" >> #include "base/misc.hh" >> #include "sim/faults.hh" >> >> @@ -73,7 +74,7 @@ >> uint64_t errorCode; >> >> X86FaultBase(const char * _faultName, const char * _mnem, >> - const uint8_t _vector, uint64_t _errorCode = 0) : >> + const uint8_t _vector, uint64_t _errorCode = -1) : >> faultName(_faultName), mnem(_mnem), >> vector(_vector), errorCode(_errorCode) >> { >> @@ -107,7 +108,7 @@ >> { >> protected: >> X86Fault(const char * name, const char * mnem, >> - const uint8_t vector, uint64_t _errorCode = 0) : >> + const uint8_t vector, uint64_t _errorCode = -1) : >> X86FaultBase(name, mnem, vector, _errorCode) >> {} >> }; >> @@ -118,7 +119,7 @@ >> { >> protected: >> X86Trap(const char * name, const char * mnem, >> - const uint8_t vector, uint64_t _errorCode = 0) : >> + const uint8_t vector, uint64_t _errorCode = -1) : >> X86FaultBase(name, mnem, vector, _errorCode) >> {} >> >> @@ -132,7 +133,7 @@ >> { >> protected: >> X86Abort(const char * name, const char * mnem, >> - const uint8_t vector, uint64_t _errorCode = 0) : >> + const uint8_t vector, uint64_t _errorCode = -1) : >> X86FaultBase(name, mnem, vector, _errorCode) >> {} >> >> @@ -146,7 +147,7 @@ >> { >> protected: >> X86Interrupt(const char * name, const char * mnem, >> - const uint8_t _vector, uint64_t _errorCode = 0) : >> + const uint8_t _vector, uint64_t _errorCode = -1) : >> X86FaultBase(name, mnem, _vector, _errorCode) >> {} >> >> @@ -273,48 +274,69 @@ >> { >> public: >> DoubleFault() : >> - X86Abort("Double-Fault", "#DF", 8) >> + X86Abort("Double-Fault", "#DF", 8, 0) >> {} >> }; >> >> class InvalidTSS : public X86Fault >> { >> public: >> - InvalidTSS() : >> - X86Fault("Invalid-TSS", "#TS", 10) >> + InvalidTSS(uint32_t _errorCode) : >> + X86Fault("Invalid-TSS", "#TS", 10, _errorCode) >> {} >> }; >> >> class SegmentNotPresent : public X86Fault >> { >> public: >> - SegmentNotPresent() : >> - X86Fault("Segment-Not-Present", "#NP", 11) >> + SegmentNotPresent(uint32_t _errorCode) : >> + X86Fault("Segment-Not-Present", "#NP", 11, _errorCode) >> {} >> }; >> >> class StackFault : public X86Fault >> { >> public: >> - StackFault() : >> - X86Fault("Stack", "#SS", 12) >> + StackFault(uint32_t _errorCode) : >> + X86Fault("Stack", "#SS", 12, _errorCode) >> {} >> }; >> >> class GeneralProtection : public X86Fault >> { >> public: >> - GeneralProtection(uint64_t _errorCode) : >> + GeneralProtection(uint32_t _errorCode) : >> X86Fault("General-Protection", "#GP", 13, _errorCode) >> {} >> }; >> >> class PageFault : public X86Fault >> { >> + protected: >> + BitUnion32(PageFaultErrorCode) >> + Bitfield<0> present; >> + Bitfield<1> write; >> + Bitfield<2> user; >> + Bitfield<3> reserved; >> + Bitfield<4> fetch; >> + EndBitUnion(PageFaultErrorCode) >> + >> public: >> - PageFault() : >> - X86Fault("Page-Fault", "#PF", 14) >> + PageFault(uint32_t _errorCode) : >> + X86Fault("Page-Fault", "#PF", 14, _errorCode) >> {} >> + PageFault(bool present, bool write, bool user, >> + bool reserved, bool fetch) : >> + X86Fault("Page-Fault", "#PF", 14, 0) >> + { >> + PageFaultErrorCode code = 0; >> + code.present = present; >> + code.write = write; >> + code.user = user; >> + code.reserved = reserved; >> + code.fetch = fetch; >> + errorCode = code; >> + } >> }; >> >> class X87FpExceptionPending : public X86Fault >> @@ -329,7 +351,7 @@ >> { >> public: >> AlignmentCheck() : >> - X86Fault("Alignment-Check", "#AC", 17) >> + X86Fault("Alignment-Check", "#AC", 17, 0) >> {} >> }; >> >> diff -r f770af5600c9 -r 8cd8e1393990 src/arch/x86/isa/microops/regop.isa >> --- a/src/arch/x86/isa/microops/regop.isa Sun Feb 01 17:07:43 2009 -0800 >> +++ b/src/arch/x86/isa/microops/regop.isa Sun Feb 01 17:08:32 2009 -0800 >> @@ -1069,7 +1069,7 @@ >> case SegSoftIntGateCheck: >> // Check permissions. >> if (desc.dpl < m5reg.cpl) { >> - fault = new GeneralProtection((uint16_t)selector); >> + fault = new GeneralProtection(selector); >> } >> // Fall through on purpose >> case SegIntGateCheck: >> @@ -1082,8 +1082,7 @@ >> case SegSSCheck: >> if (selector.si || selector.ti) { >> if (!desc.p) { >> - //FIXME This needs to also push the selector. >> - fault = new StackFault; >> + fault = new StackFault(selector); >> } >> } else { >> if ((m5reg.submode != SixtyFourBitMode || >> @@ -1092,7 +1091,7 @@ >> desc.type.codeOrData == 0 && desc.type.w) || >> (desc.dpl != m5reg.cpl) || >> (selector.rpl != m5reg.cpl)) { >> - fault = new GeneralProtection(psrc1 & 0xFFFF); >> + fault = new GeneralProtection(selector); >> } >> } >> break; >> @@ -1103,9 +1102,9 @@ >> !(desc.s == 1 && desc.type.codeOrData == 1) || >> (!desc.type.c && desc.dpl != selector.rpl) || >> (desc.type.c && desc.dpl > selector.rpl)) { >> - fault = new GeneralProtection(psrc1 & 0xFFFF); >> + fault = new GeneralProtection(selector); >> } else if (!desc.p) { >> - fault = new SegmentNotPresent; >> + fault = new SegmentNotPresent(selector); >> } >> break; >> } >> _______________________________________________ >> m5-dev mailing list >> [email protected] >> http://m5sim.org/mailman/listinfo/m5-dev >> >> > > _______________________________________________ > m5-dev mailing list > [email protected] > http://m5sim.org/mailman/listinfo/m5-dev > _______________________________________________ m5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/m5-dev
