Yeah, well, x86 cornered the market on odd. Gabe
nathan binkert wrote: > We don't have it because we haven't implemented an ISA that supports > it, so I see no reason not to add it. (It's pretty odd to put a fence > in for reads and not want writes to be fenced too.) > > Nate > > On Fri, Feb 6, 2009 at 9:06 PM, Gabe Black <[email protected]> wrote: > >> I notice that we have static inst flags called IsMemBarrier and >> IsWriteBarrier, but no IsReadBarrier or equivalent. Should we? I need >> something like that to implement the lfence instruction. >> >> Gabe >> _______________________________________________ >> m5-dev mailing list >> [email protected] >> http://m5sim.org/mailman/listinfo/m5-dev >> >> >> > _______________________________________________ > m5-dev mailing list > [email protected] > http://m5sim.org/mailman/listinfo/m5-dev > _______________________________________________ m5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/m5-dev
