Are you talking about just x86? Nate
On Mon, Feb 9, 2009 at 1:19 PM, Gabriel Michael Black <gbl...@eecs.umich.edu> wrote: > I have a patch in my queue which, for reasons I can get into if people > are interested, prevents fetching in the simple CPU while in the > middle of a macroop. A side effect of this is that benchmarks on the > timing simple CPU have ~25% faster simulated execution time. Real time > isn't any faster, I don't think, but this was such a big difference I > thought you might want to know. The patch is like any of my others in > that it won't get to the head until the tlb miss mechanism is hammered > out, so don't worry about it in the short term. > > Gabe > > _______________________________________________ > m5-dev mailing list > m5-dev@m5sim.org > http://m5sim.org/mailman/listinfo/m5-dev > > _______________________________________________ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev
