changeset 177534612ec0 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=177534612ec0
description:
X86: Implement the lldt instruction.
diffstat:
2 files changed, 52 insertions(+), 1 deletion(-)
src/arch/x86/isa/decoder/two_byte_opcodes.isa | 2
src/arch/x86/isa/insts/system/segmentation.py | 51 +++++++++++++++++++++++++
diffs (73 lines):
diff -r c30088a243ad -r 177534612ec0
src/arch/x86/isa/decoder/two_byte_opcodes.isa
--- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa Wed Feb 25 10:21:21
2009 -0800
+++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa Wed Feb 25 10:21:27
2009 -0800
@@ -93,7 +93,7 @@
0x00: decode MODRM_REG {
0x0: sldt_Mw_or_Rv();
0x1: str_Mw_or_Rv();
- 0x2: lldt_Mw_or_Rv();
+ 0x2: Inst::LLDT(Ew);
0x3: Inst::LTR(Ew);
0x4: verr_Mw_or_Rv();
0x5: verw_Mw_or_Rv();
diff -r c30088a243ad -r 177534612ec0
src/arch/x86/isa/insts/system/segmentation.py
--- a/src/arch/x86/isa/insts/system/segmentation.py Wed Feb 25 10:21:21
2009 -0800
+++ b/src/arch/x86/isa/insts/system/segmentation.py Wed Feb 25 10:21:27
2009 -0800
@@ -216,6 +216,57 @@
st t1, tsg, [8, t4, t0], dataSize=8
};
+def macroop LLDT_R
+{
+ chks reg, t0, InGDTCheck, flags=(EZF,)
+ br label("end"), flags=(CEZF,)
+ limm t4, 0
+ srli t4, reg, 3, dataSize=2
+ ldst t1, tsg, [8, t4, t0], dataSize=8
+ ld t2, tsg, [8, t4, t0], 8, dataSize=8
+ chks reg, t1, LDTCheck
+ wrdh t3, t1, t2
+ wrdl tr, t1, reg
+ wrbase tr, t3, dataSize=8
+end:
+ fault "NoFault"
+};
+
+def macroop LLDT_M
+{
+ ld t5, seg, sib, disp, dataSize=2
+ chks t5, t0, InGDTCheck, flags=(EZF,)
+ br label("end"), flags=(CEZF,)
+ limm t4, 0
+ srli t4, t5, 3, dataSize=2
+ ldst t1, tsg, [8, t4, t0], dataSize=8
+ ld t2, tsg, [8, t4, t0], 8, dataSize=8
+ chks t5, t1, LDTCheck
+ wrdh t3, t1, t2
+ wrdl tr, t1, t5
+ wrbase tr, t3, dataSize=8
+end:
+ fault "NoFault"
+};
+
+def macroop LLDT_P
+{
+ rdip t7
+ ld t5, seg, riprel, disp, dataSize=2
+ chks t5, t0, InGDTCheck, flags=(EZF,)
+ br label("end"), flags=(CEZF,)
+ limm t4, 0
+ srli t4, t5, 3, dataSize=2
+ ldst t1, tsg, [8, t4, t0], dataSize=8
+ ld t2, tsg, [8, t4, t0], 8, dataSize=8
+ chks t5, t1, LDTCheck
+ wrdh t3, t1, t2
+ wrdl tr, t1, t5
+ wrbase tr, t3, dataSize=8
+end:
+ fault "NoFault"
+};
+
def macroop SWAPGS
{
rdval t1, kernel_gs_base, dataSize=8
_______________________________________________
m5-dev mailing list
[email protected]
http://m5sim.org/mailman/listinfo/m5-dev