Yea, it makes sense to do that now where perhaps it did not before. Another approach that you may or may not like better would be to activate the context (which should take you from Halted to Active) but then immediately suspend it.
Steve On Fri, Apr 17, 2009 at 10:40 PM, Gabe Black <[email protected]> wrote: > Just to make sure I'm interpreting this correctly, I should be able to > suspend a halted CPU to go directly to suspended, correct? The simple > CPU asserts in that case. The attached patch fixes it, but I want to > make sure I'm not getting the status stuff turned around again. > > Gabe > > Lisa Hsu wrote: > > No, we don't support that. O3 is too complicated, has too much state > > to checkpoint, so we only checkpoint and restore AtomicCPU, then move > > into the desired CPU model post-checkpoint. > > > > On Fri, Apr 17, 2009 at 7:26 PM, Gabriel Michael Black > > <[email protected] <mailto:[email protected]>> wrote: > > > > Quoting Steve Reinhardt <[email protected] <mailto:[email protected] > >>: > > > > > On Fri, Apr 17, 2009 at 1:43 PM, Gabriel Michael Black < > > > [email protected] <mailto:[email protected]>> wrote: > > > > > >> > > >> You should also be sure to test starting from a checkpoint which I > > >> believe is different from a switchover, although I'm not sure. > > > > > > > > > It shouldn't be different from O3's perspective; we always > > restore from a > > > checkpoint into a SimpleCPU model and then switch over to O3, > > since you > > > can't directly restore a SimpleCPU checkpoint into and O3 model. > > > > But you could checkpoint O3 and then restore directly, couldn't you? > > > > Gabe > > > > _______________________________________________ > > m5-dev mailing list > > [email protected] <mailto:[email protected]> > > http://m5sim.org/mailman/listinfo/m5-dev > > > > > > ------------------------------------------------------------------------ > > > > _______________________________________________ > > m5-dev mailing list > > [email protected] > > http://m5sim.org/mailman/listinfo/m5-dev > > > > > diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc > --- a/src/cpu/simple/atomic.cc > +++ b/src/cpu/simple/atomic.cc > @@ -270,6 +270,9 @@ > > assert(thread_num == 0); > assert(thread); > + > + if (_status == Idle) > + return; > > assert(_status == Running); > > diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc > --- a/src/cpu/simple/timing.cc > +++ b/src/cpu/simple/timing.cc > @@ -232,6 +232,9 @@ > > assert(thread_num == 0); > assert(thread); > + > + if (_status == Idle) > + return; > > assert(_status == Running); > > > _______________________________________________ > m5-dev mailing list > [email protected] > http://m5sim.org/mailman/listinfo/m5-dev > >
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