changeset 4c21637acedd in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=4c21637acedd
description:
mips-tlb-fix: check for alignment faults.\nMIPS was never updated to
use TLBS correcty in SE mode. The error was forwarding translations directly to
pageTable. The TLB should check for alignment faults at bare minimum here but
in the long run we should be using TLBs in SE mode for MIPS.
diffstat:
1 file changed, 12 insertions(+)
src/arch/mips/tlb.cc | 12 ++++++++++++
diffs (22 lines):
diff -r 0b0341bfb359 -r 4c21637acedd src/arch/mips/tlb.cc
--- a/src/arch/mips/tlb.cc Sat Apr 18 10:42:29 2009 -0400
+++ b/src/arch/mips/tlb.cc Sat Apr 18 10:42:29 2009 -0400
@@ -427,6 +427,18 @@
TLB::translateData(RequestPtr req, ThreadContext *tc, bool write)
{
#if !FULL_SYSTEM
+ //@TODO: This should actually use TLB instead of going directly
+ // to the page table in syscall mode.
+ /**
+ * Check for alignment faults
+ */
+ if (req->getVaddr() & (req->getSize() - 1)) {
+ DPRINTF(TLB, "Alignment Fault on %#x, size = %d", req->getVaddr(),
+ req->getSize());
+ return new AlignmentFault();
+ }
+
+
Process * p = tc->getProcessPtr();
Fault fault = p->pTable->translate(req);
_______________________________________________
m5-dev mailing list
[email protected]
http://m5sim.org/mailman/listinfo/m5-dev
