changeset 882f1b921de7 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=882f1b921de7
description:
X86: Make the interrupt entering microcode record the value to use, not
actually use it.
diffstat:
1 file changed, 1 insertion(+), 1 deletion(-)
src/arch/x86/isa/insts/romutil.py | 2 +-
diffs (12 lines):
diff -r 4435d13700de -r 882f1b921de7 src/arch/x86/isa/insts/romutil.py
--- a/src/arch/x86/isa/insts/romutil.py Sun Apr 19 03:24:51 2009 -0700
+++ b/src/arch/x86/isa/insts/romutil.py Sun Apr 19 03:36:57 2009 -0700
@@ -84,7 +84,7 @@
sub t0, t5, t10, flags=(EZF,), dataSize=8
# We're going to change priviledge, so zero out the stack selector. We
# need to let the IST have priority so we don't branch yet.
- wrsel t11, t0, flags=(nCEZF,)
+ mov t11, t0, t0, flags=(nCEZF,)
# Check the IST field of the gate descriptor
srli t12, t4, 32, dataSize=8
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