> I don't see much benefit in doing the split twice (once for page crossings > and a second time for cache line crossings), though if there was a way to > isolate the bulk of the code in a single function that gets called twice it > wouldn't be too bad. There is some merit in only calling the TLB once on a > single-page cache-line-split transaction though, particularly because > calling it twice in this case will make your TLB access and hit rates > artificially high. Doing two separate split checks might be the easiest way > of doing this, or there could be a separate test on cache splits that copies > the translation from one request to the other instead of calling the TLB a > second time if the two accesses are on the same page.
I was mostly referring to the realism. If unaligned accesses are indeed very fast on modern x86, then people might intentionally start to use them even more. Nate _______________________________________________ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev
