On Sun, May 3, 2009 at 12:09 AM, Gabe Black <[email protected]> wrote:
> While this does avoid the segfault, it also causes some other bug which > crashes just about any of the simple timing regressions. I hadn't > actually tried any of the quick regressions when I sent that out since > my other testing had tricked me into thinking everything was fine. I > think it has something to do with faulting accesses not dealing with the > fault right away and instead continuing into the remainder of > completeIfetch. Rather than try to bandaid this into working, I'm > thinking I'll just going to go for it and try to see what reorganizing > the code buys me. > It seems like anything that uses the timing-mode translation would have to be prepared to not know whether a translation succeeds or not until a later event is scheduled.... are you saying that this change exposes a fundamental problem in the structure of the simple timing cpu with regard to how it deals with timing-mode translation? That's what it sounds like to me, but I just wanted to clarify. Thanks, Steve
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