changeset 1d6fac03f389 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=1d6fac03f389
description:
mips-merge: merge hello world regress for inorder cpu
w/latest changes
diffstat:
8 files changed, 565 insertions(+), 270 deletions(-)
build_opts/MIPS_SE | 1
src/arch/mips/isa/formats/mem.isa | 260 ---------
src/arch/mips/isa/formats/util.isa | 26
src/arch/mips/regfile/float_regfile.hh | 1
tests/quick/00.hello/ref/mips/linux/inorder-timing/config.ini | 277 ++++++++++
tests/quick/00.hello/ref/mips/linux/inorder-timing/simerr | 3
tests/quick/00.hello/ref/mips/linux/inorder-timing/simout | 17
tests/quick/00.hello/ref/mips/linux/inorder-timing/stats.txt | 250 +++++++++
diffs (truncated from 992 to 300 lines):
diff -r 39a0b4026bda -r 1d6fac03f389 build_opts/MIPS_SE
--- a/build_opts/MIPS_SE Tue May 12 22:33:05 2009 -0700
+++ b/build_opts/MIPS_SE Wed May 13 02:02:05 2009 -0400
@@ -1,2 +1,3 @@
TARGET_ISA = 'mips'
FULL_SYSTEM = 0
+CPU_MODELS = 'AtomicSimpleCPU,TimingSimpleCPU,O3CPU,InOrderCPU'
\ No newline at end of file
diff -r 39a0b4026bda -r 1d6fac03f389 src/arch/mips/isa/formats/mem.isa
--- a/src/arch/mips/isa/formats/mem.isa Tue May 12 22:33:05 2009 -0700
+++ b/src/arch/mips/isa/formats/mem.isa Wed May 13 02:02:05 2009 -0400
@@ -41,36 +41,21 @@
class Memory : public MipsStaticInst
{
protected:
-
/// Memory request flags. See mem_req_base.hh.
Request::Flags memAccessFlags;
- /// Pointer to EAComp object.
- const StaticInstPtr eaCompPtr;
- /// Pointer to MemAcc object.
- const StaticInstPtr memAccPtr;
/// Displacement for EA calculation (signed).
int32_t disp;
/// Constructor
- Memory(const char *mnem, MachInst _machInst, OpClass __opClass,
- StaticInstPtr _eaCompPtr = nullStaticInstPtr,
- StaticInstPtr _memAccPtr = nullStaticInstPtr)
+ Memory(const char *mnem, MachInst _machInst, OpClass __opClass)
: MipsStaticInst(mnem, _machInst, __opClass),
- eaCompPtr(_eaCompPtr), memAccPtr(_memAccPtr),
disp(sext<16>(OFFSET))
{
}
std::string
generateDisassembly(Addr pc, const SymbolTable *symtab) const;
-
- public:
-
- const StaticInstPtr &eaCompInst() const { return eaCompPtr; }
- const StaticInstPtr &memAccInst() const { return memAccPtr; }
-
- Request::Flags memAccFlags() { return memAccessFlags; }
};
/**
@@ -81,10 +66,8 @@
{
protected:
/// Constructor
- MemoryNoDisp(const char *mnem, ExtMachInst _machInst, OpClass
__opClass,
- StaticInstPtr _eaCompPtr = nullStaticInstPtr,
- StaticInstPtr _memAccPtr = nullStaticInstPtr)
- : Memory(mnem, _machInst, __opClass, _eaCompPtr, _memAccPtr)
+ MemoryNoDisp(const char *mnem, ExtMachInst _machInst, OpClass
__opClass)
+ : Memory(mnem, _machInst, __opClass)
{
}
@@ -149,32 +132,6 @@
*/
class %(class_name)s : public %(base_class)s
{
- protected:
-
- /**
- * "Fake" effective address computation class for "%(mnemonic)s".
- */
- class EAComp : public %(base_class)s
- {
- public:
- /// Constructor
- EAComp(ExtMachInst machInst);
-
- %(BasicExecDeclare)s
- };
-
- /**
- * "Fake" memory access instruction class for "%(mnemonic)s".
- */
- class MemAcc : public %(base_class)s
- {
- public:
- /// Constructor
- MemAcc(ExtMachInst machInst);
-
- %(BasicExecDeclare)s
- };
-
public:
/// Constructor.
@@ -182,14 +139,17 @@
%(BasicExecDeclare)s
+ %(EACompDeclare)s
+
%(InitiateAccDeclare)s
%(CompleteAccDeclare)s
-
- %(MemAccSizeDeclare)s
};
}};
+def template EACompDeclare {{
+ Fault eaComp(%(CPU_exec_context)s *, Trace::InstRecord *) const;
+}};
def template InitiateAccDeclare {{
Fault initiateAcc(%(CPU_exec_context)s *, Trace::InstRecord *) const;
@@ -200,53 +160,18 @@
Fault completeAcc(Packet *, %(CPU_exec_context)s *, Trace::InstRecord *)
const;
}};
-def template MemAccSizeDeclare {{
- int memAccSize(%(CPU_exec_context)s *xc);
-}};
-
-
-def template MiscMemAccSize {{
- int %(class_name)s::memAccSize(%(CPU_exec_context)s *xc)
- {
- panic("Misc instruction does not support split access method!");
- return 0;
- }
-}};
-
-def template EACompConstructor {{
- /** TODO: change op_class to AddrGenOp or something (requires
- * creating new member of OpClass enum in op_class.hh, updating
- * config files, etc.). */
- inline %(class_name)s::EAComp::EAComp(ExtMachInst machInst)
- : %(base_class)s("%(mnemonic)s (EAComp)", machInst, IntAluOp)
+def template LoadStoreConstructor {{
+ inline %(class_name)s::%(class_name)s(ExtMachInst machInst)
+ : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s)
{
%(constructor)s;
}
}};
-def template MemAccConstructor {{
- inline %(class_name)s::MemAcc::MemAcc(ExtMachInst machInst)
- : %(base_class)s("%(mnemonic)s (MemAcc)", machInst, %(op_class)s)
- {
- %(constructor)s;
- }
-}};
-
-
-def template LoadStoreConstructor {{
- inline %(class_name)s::%(class_name)s(ExtMachInst machInst)
- : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
- new EAComp(machInst), new MemAcc(machInst))
- {
- %(constructor)s;
- }
-}};
-
-
def template EACompExecute {{
Fault
- %(class_name)s::EAComp::execute(%(CPU_exec_context)s *xc,
+ %(class_name)s::eaComp(%(CPU_exec_context)s *xc,
Trace::InstRecord *traceData) const
{
Addr EA;
@@ -272,63 +197,6 @@
}
}};
-def template LoadStoreFPEACompExecute {{
- Fault
- %(class_name)s::EAComp::execute(%(CPU_exec_context)s *xc,
- Trace::InstRecord *traceData) const
- {
- Addr EA;
- Fault fault = NoFault;
-
- %(fp_enable_check)s;
- if(fault != NoFault)
- return fault;
- %(op_decl)s;
- %(op_rd)s;
- %(ea_code)s;
-
- // NOTE: Trace Data is written using execute or completeAcc templates
- if (fault == NoFault) {
- xc->setEA(EA);
- }
-
- return fault;
- }
-}};
-
-
-def template LoadMemAccExecute {{
- Fault
- %(class_name)s::MemAcc::execute(%(CPU_exec_context)s *xc,
- Trace::InstRecord *traceData) const
- {
- Addr EA;
-
- Fault fault = NoFault;
-
- if (this->isFloating()) {
- %(fp_enable_check)s;
-
- if(fault != NoFault)
- return fault;
- }
-
- %(op_decl)s;
- %(op_rd)s;
-
- EA = xc->getEA();
-
- fault = xc->read(EA, (uint%(mem_acc_size)d_t&)Mem, memAccessFlags);
-
- %(memacc_code)s;
-
- // NOTE: Write back data using execute or completeAcc templates
-
- return fault;
- }
-}};
-
-
def template LoadExecute {{
Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
Trace::InstRecord *traceData) const
@@ -418,80 +286,6 @@
}
}};
-
-def template LoadStoreMemAccSize {{
- int %(class_name)s::memAccSize(%(CPU_exec_context)s *xc)
- {
- // Return the memory access size in bytes
- return (%(mem_acc_size)d / 8);
- }
-}};
-
-def template StoreMemAccExecute {{
- Fault
- %(class_name)s::MemAcc::execute(%(CPU_exec_context)s *xc,
- Trace::InstRecord *traceData) const
- {
- Addr EA;
- Fault fault = NoFault;
-
- %(fp_enable_check)s;
- %(op_decl)s;
- %(op_rd)s;
-
- EA = xc->getEA();
-
- if (fault == NoFault) {
- %(memacc_code)s;
- }
-
- if (fault == NoFault) {
- fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA,
- memAccessFlags, NULL);
- // @NOTE: Need to Call Complete Access to Set Trace Data
- //if (traceData) { traceData->setData(Mem); }
- }
-
- return fault;
- }
-}};
-
-def template StoreCondMemAccExecute {{
- Fault
- %(class_name)s::MemAcc::execute(%(CPU_exec_context)s *xc,
- Trace::InstRecord *traceData) const
- {
- Addr EA;
- Fault fault = NoFault;
- uint64_t write_result = 0;
-
- %(fp_enable_check)s;
- %(op_decl)s;
- %(op_rd)s;
- EA = xc->getEA();
-
- if (fault == NoFault) {
- %(memacc_code)s;
- }
-
- if (fault == NoFault) {
- fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA,
- memAccessFlags, &write_result);
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