I'll look at these in more detail tonight, but thank you in advance for finding and also fixing these bugs. I'd be willing to believe your flags for open are right and the ones in M5 are inherited from MIPS, SPARC, or Alpha, but I don't know that for sure.
There isn't anyone I know of focusing their efforts on our ARM support right now (Ali maybe?), but it would be helpful to have your QEMU patches around. If you'd like to look for more discrepancies yourself, we'd love to get more fixes. What real ARM system did you use to run your test, by the way? Gabe Quoting Jack Whitham <[email protected]>: > Hi, > > I've found a few bugs in the M5 ARM implementation. > Here are some fixes for the latest (06/23/09) development version. > > macromem-fix - added unimplemented load/store multiple instructions. > > lr-fix - the link register is incorrectly overwritten by > non-executed branch and link operations, e.g. "blne" > when "Z = 1". > > longmul-loads - long (64bit) multiplication instructions should > ensure that only 32 bits of the input registers are > actually used; added some unimplemented load instructions > > Also attached: > > tc.tar.gz - a test case that fails if the above fixes are not in place. > It prints "Tests passed" on success. I successfully ran the program on > a real ARM system and also on QEMU's ARM simulator - it passes in both > cases. > > > > I may also have found a bug in src/arch/arm/linux/linux.hh; > it seems that some of the flags named TGT_O_RDONLY ... TGT_O_NOATIME > don't match the values defined in my kernel headers. This affects > some common operations such as creating a file with fopen. However, I > hesitate to propose a fix: perhaps I am simply using the wrong C library > or Linux kernel. > > I used an execution trace comparison with QEMU to detect the above bugs. > This requires some quite invasive modifications to QEMU, since unlike M5 > it does not produce a useful execution trace "out of the box". If you > would be interested in a patch for QEMU, please let me know. > > > -- > Jack Whitham > [email protected] > > _______________________________________________ m5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/m5-dev
