changeset c7295a4826d5 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=c7295a4826d5
description:
Registers: Eliminate the ISA defined floating point register file.
diffstat:
30 files changed, 83 insertions(+), 1082 deletions(-)
src/arch/alpha/SConscript | 1
src/arch/alpha/floatregfile.cc | 57 ------------
src/arch/alpha/floatregfile.hh | 86 -------------------
src/arch/alpha/regfile.cc | 2
src/arch/alpha/regfile.hh | 27 ------
src/arch/arm/regfile/float_regfile.hh | 140 -------------------------------
src/arch/arm/regfile/regfile.cc | 2
src/arch/arm/regfile/regfile.hh | 46 +++++-----
src/arch/mips/SConscript | 1
src/arch/mips/regfile.cc | 25 -----
src/arch/mips/regfile/float_regfile.cc | 80 ------------------
src/arch/mips/regfile/float_regfile.hh | 94 ---------------------
src/arch/mips/regfile/regfile.cc | 28 ------
src/arch/mips/regfile/regfile.hh | 35 +++++--
src/arch/sparc/SConscript | 1
src/arch/sparc/floatregfile.cc | 80 ------------------
src/arch/sparc/floatregfile.hh | 74 ----------------
src/arch/sparc/regfile.cc | 23 -----
src/arch/sparc/regfile.hh | 10 --
src/arch/sparc/sparc_traits.hh | 3
src/arch/x86/SConscript | 1
src/arch/x86/floatregfile.cc | 141 --------------------------------
src/arch/x86/floatregfile.hh | 132 -----------------------------
src/arch/x86/regfile.cc | 23 -----
src/arch/x86/regfile.hh | 17 +--
src/arch/x86/tlb.cc | 1
src/cpu/inorder/cpu.cc | 10 +-
src/cpu/inorder/cpu.hh | 5 -
src/cpu/simple_thread.cc | 2
src/cpu/simple_thread.hh | 18 ++--
diffs (truncated from 1672 to 300 lines):
diff -r 781969fbeca9 -r c7295a4826d5 src/arch/alpha/SConscript
--- a/src/arch/alpha/SConscript Wed Jul 08 23:02:20 2009 -0700
+++ b/src/arch/alpha/SConscript Wed Jul 08 23:02:20 2009 -0700
@@ -34,7 +34,6 @@
if env['TARGET_ISA'] == 'alpha':
Source('ev5.cc')
Source('faults.cc')
- Source('floatregfile.cc')
Source('intregfile.cc')
Source('ipr.cc')
Source('isa.cc')
diff -r 781969fbeca9 -r c7295a4826d5 src/arch/alpha/floatregfile.cc
--- a/src/arch/alpha/floatregfile.cc Wed Jul 08 23:02:20 2009 -0700
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,57 +0,0 @@
-/*
- * Copyright (c) 2003-2005 The Regents of The University of Michigan
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Authors: Steve Reinhardt
- * Gabe Black
- * Kevin Lim
- */
-
-#include <cstring>
-
-#include "arch/alpha/floatregfile.hh"
-#include "sim/serialize.hh"
-
-namespace AlphaISA {
-void
-FloatRegFile::clear()
-{
- std::memset(d, 0, sizeof(d));
-}
-
-void
-FloatRegFile::serialize(std::ostream &os)
-{
- SERIALIZE_ARRAY(q, NumFloatRegs);
-}
-
-void
-FloatRegFile::unserialize(Checkpoint *cp, const std::string §ion)
-{
- UNSERIALIZE_ARRAY(q, NumFloatRegs);
-}
-
-} // namespace AlphaISA
diff -r 781969fbeca9 -r c7295a4826d5 src/arch/alpha/floatregfile.hh
--- a/src/arch/alpha/floatregfile.hh Wed Jul 08 23:02:20 2009 -0700
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,86 +0,0 @@
-/*
- * Copyright (c) 2003-2005 The Regents of The University of Michigan
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Authors: Steve Reinhardt
- * Gabe Black
- */
-
-#ifndef __ARCH_ALPHA_FLOATREGFILE_HH__
-#define __ARCH_ALPHA_FLOATREGFILE_HH__
-
-#include <iosfwd>
-#include <string>
-
-#include "arch/alpha/isa_traits.hh"
-#include "arch/alpha/types.hh"
-
-class Checkpoint;
-
-namespace AlphaISA {
-
-class FloatRegFile
-{
- public:
- union {
- uint64_t q[NumFloatRegs]; // integer qword view
- double d[NumFloatRegs]; // double-precision floating point view
- };
-
- void clear();
-
- void serialize(std::ostream &os);
- void unserialize(Checkpoint *cp, const std::string §ion);
-
- FloatReg
- readReg(int floatReg)
- {
- return d[floatReg];
- }
-
- FloatRegBits
- readRegBits(int floatReg)
- {
- return q[floatReg];
- }
-
- void
- setReg(int floatReg, const FloatReg &val)
- {
- d[floatReg] = val;
- }
-
- void
- setRegBits(int floatReg, const FloatRegBits &val)
- {
- q[floatReg] = val;
- }
-
-};
-
-} // namespace AlphaISA
-
-#endif // __ARCH_ALPHA_FLOATREGFILE_HH__
diff -r 781969fbeca9 -r c7295a4826d5 src/arch/alpha/regfile.cc
--- a/src/arch/alpha/regfile.cc Wed Jul 08 23:02:20 2009 -0700
+++ b/src/arch/alpha/regfile.cc Wed Jul 08 23:02:20 2009 -0700
@@ -42,7 +42,6 @@
RegFile::serialize(EventManager *em, ostream &os)
{
intRegFile.serialize(os);
- floatRegFile.serialize(os);
SERIALIZE_SCALAR(pc);
SERIALIZE_SCALAR(npc);
#if FULL_SYSTEM
@@ -54,7 +53,6 @@
RegFile::unserialize(EventManager *em, Checkpoint *cp, const string §ion)
{
intRegFile.unserialize(cp, section);
- floatRegFile.unserialize(cp, section);
UNSERIALIZE_SCALAR(pc);
UNSERIALIZE_SCALAR(npc);
#if FULL_SYSTEM
diff -r 781969fbeca9 -r c7295a4826d5 src/arch/alpha/regfile.hh
--- a/src/arch/alpha/regfile.hh Wed Jul 08 23:02:20 2009 -0700
+++ b/src/arch/alpha/regfile.hh Wed Jul 08 23:02:20 2009 -0700
@@ -32,7 +32,6 @@
#define __ARCH_ALPHA_REGFILE_HH__
#include "arch/alpha/isa_traits.hh"
-#include "arch/alpha/floatregfile.hh"
#include "arch/alpha/intregfile.hh"
#include "arch/alpha/miscregfile.hh"
#include "arch/alpha/types.hh"
@@ -92,7 +91,6 @@
protected:
IntRegFile intRegFile; // (signed) integer register file
- FloatRegFile floatRegFile; // floating point register file
public:
#if FULL_SYSTEM
@@ -103,31 +101,6 @@
clear()
{
intRegFile.clear();
- floatRegFile.clear();
- }
-
- FloatReg
- readFloatReg(int floatReg)
- {
- return floatRegFile.d[floatReg];
- }
-
- FloatRegBits
- readFloatRegBits(int floatReg)
- {
- return floatRegFile.q[floatReg];
- }
-
- void
- setFloatReg(int floatReg, const FloatReg &val)
- {
- floatRegFile.d[floatReg] = val;
- }
-
- void
- setFloatRegBits(int floatReg, const FloatRegBits &val)
- {
- floatRegFile.q[floatReg] = val;
}
IntReg
diff -r 781969fbeca9 -r c7295a4826d5 src/arch/arm/regfile/float_regfile.hh
--- a/src/arch/arm/regfile/float_regfile.hh Wed Jul 08 23:02:20 2009 -0700
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,140 +0,0 @@
-/*
- * Copyright (c) 2007-2008 The Florida State University
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Authors: Stephen Hines
- */
-
-#ifndef __ARCH_ARM_REGFILE_FLOAT_REGFILE_HH__
-#define __ARCH_ARM_REGFILE_FLOAT_REGFILE_HH__
-
-#include "arch/arm/types.hh"
-#include "arch/arm/isa_traits.hh"
-#include "base/misc.hh"
-#include "base/bitfield.hh"
-#include "sim/faults.hh"
-#include "sim/serialize.hh"
-
-#include <string>
-
-class Checkpoint;
-
-namespace ArmISA
-{
- static inline std::string getFloatRegName(RegIndex)
- {
- return "";
- }
-
- const uint32_t ARM32_QNAN = 0x7fbfffff;
- const uint64_t ARM64_QNAN = ULL(0x7fbfffffffffffff);
-
- enum FPControlRegNums {
- FIR = NumFloatArchRegs,
- FCCR,
- FEXR,
- FENR,
- FCSR
- };
-
- enum FCSRBits {
- Inexact = 1,
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