changeset a790c9501c9f in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=a790c9501c9f
description:
Automated merge with ssh://[email protected]/m5
diffstat:
13 files changed, 57 insertions(+), 360 deletions(-)
src/mem/ruby/libruby.hh | 3
src/mem/ruby/profiler/AddressProfiler.cc | 29 -
src/mem/ruby/profiler/AddressProfiler.hh | 3
src/mem/ruby/profiler/Profiler.cc | 218 ----------
src/mem/ruby/profiler/Profiler.hh | 37 -
src/mem/ruby/slicc_interface/RubySlicc_Profiler_interface.cc | 25 -
src/mem/ruby/system/CacheMemory.hh | 6
src/mem/ruby/system/DMASequencer.cc | 1
src/mem/ruby/system/System.cc | 15
src/mem/ruby/system/TBETable.hh | 1
tests/quick/50.memtest/ref/alpha/linux/memtest-ruby/ruby.stats | 65 +-
tests/quick/50.memtest/ref/alpha/linux/memtest-ruby/simout | 8
tests/quick/50.memtest/ref/alpha/linux/memtest-ruby/stats.txt | 6
diffs (truncated from 1000 to 300 lines):
diff -r 550f76603d41 -r a790c9501c9f src/mem/ruby/libruby.hh
--- a/src/mem/ruby/libruby.hh Sun Aug 02 18:01:13 2009 -0700
+++ b/src/mem/ruby/libruby.hh Mon Aug 03 11:39:08 2009 -0500
@@ -14,7 +14,8 @@
RubyRequestType_Locked_Read,
RubyRequestType_Locked_Write,
RubyRequestType_RMW_Read,
- RubyRequestType_RMW_Write
+ RubyRequestType_RMW_Write,
+ RubyRequestType_NUM
};
enum RubyAccessMode {
diff -r 550f76603d41 -r a790c9501c9f src/mem/ruby/profiler/AddressProfiler.cc
--- a/src/mem/ruby/profiler/AddressProfiler.cc Sun Aug 02 18:01:13 2009 -0700
+++ b/src/mem/ruby/profiler/AddressProfiler.cc Mon Aug 03 11:39:08 2009 -0500
@@ -54,7 +54,6 @@
m_macroBlockAccessTrace = new Map<Address, AccessTraceForAddress>;
m_programCounterAccessTrace = new Map<Address, AccessTraceForAddress>;
m_retryProfileMap = new Map<Address, AccessTraceForAddress>;
- m_persistentPredictionProfileMap = new Map<Address, AccessTraceForAddress>;
clearStats();
}
@@ -64,7 +63,6 @@
delete m_macroBlockAccessTrace;
delete m_programCounterAccessTrace;
delete m_retryProfileMap;
- delete m_persistentPredictionProfileMap;
}
void AddressProfiler::setHotLines(bool hot_lines){
@@ -125,31 +123,10 @@
m_retryProfileHisto.printPercent(out);
out << endl;
- out << "retry_histogram_per_instruction: ";
- m_retryProfileHisto.printWithMultiplier(out, 1.0 /
double(g_system_ptr->getProfiler()->getTotalInstructionsExecuted()));
- out << endl;
-
printSorted(out, m_retryProfileMap, "block_address");
out << endl;
}
- if (m_persistentPredictionProfileHisto.size() > 0) {
- out << "Persistent Prediction Profile" << endl;
- out << "-------------" << endl;
- out << endl;
- out << "persistent prediction_histogram: " <<
m_persistentPredictionProfileHisto << endl;
-
- out << "persistent prediction_histogram_percent: ";
- m_persistentPredictionProfileHisto.printPercent(out);
- out << endl;
-
- out << "persistentPrediction_histogram_per_instruction: ";
- m_persistentPredictionProfileHisto.printWithMultiplier(out, 1.0 /
double(g_system_ptr->getProfiler()->getTotalInstructionsExecuted()));
- out << endl;
-
- printSorted(out, m_persistentPredictionProfileMap, "block_address");
- out << endl;
- }
}
void AddressProfiler::clearStats()
@@ -233,12 +210,6 @@
}
}
-void AddressProfiler::profilePersistentPrediction(const Address& data_addr,
AccessType type)
-{
- m_persistentPredictionProfileHisto.add(1);
- lookupTraceForAddress(data_addr,
m_persistentPredictionProfileMap).addSample(1);
-}
-
// ***** Normal Functions ******
static void printSorted(ostream& out, const Map<Address,
AccessTraceForAddress>* record_map, string description)
diff -r 550f76603d41 -r a790c9501c9f src/mem/ruby/profiler/AddressProfiler.hh
--- a/src/mem/ruby/profiler/AddressProfiler.hh Sun Aug 02 18:01:13 2009 -0700
+++ b/src/mem/ruby/profiler/AddressProfiler.hh Mon Aug 03 11:39:08 2009 -0500
@@ -63,7 +63,6 @@
void clearStats();
void addTraceSample(Address data_addr, Address pc_addr, CacheRequestType
type, AccessModeType access_mode, NodeID id, bool sharing_miss);
- void profilePersistentPrediction(const Address& data_addr, AccessType type);
void profileRetry(const Address& data_addr, AccessType type, int count);
void profileGetX(const Address& datablock, const Address& PC, const Set&
owner, const Set& sharers, NodeID requestor);
void profileGetS(const Address& datablock, const Address& PC, const Set&
owner, const Set& sharers, NodeID requestor);
@@ -87,8 +86,6 @@
Map<Address, AccessTraceForAddress>* m_macroBlockAccessTrace;
Map<Address, AccessTraceForAddress>* m_programCounterAccessTrace;
Map<Address, AccessTraceForAddress>* m_retryProfileMap;
- Map<Address, AccessTraceForAddress>* m_persistentPredictionProfileMap;
- Histogram m_persistentPredictionProfileHisto;
Histogram m_retryProfileHisto;
Histogram m_retryProfileHistoWrite;
Histogram m_retryProfileHistoRead;
diff -r 550f76603d41 -r a790c9501c9f src/mem/ruby/profiler/Profiler.cc
--- a/src/mem/ruby/profiler/Profiler.cc Sun Aug 02 18:01:13 2009 -0700
+++ b/src/mem/ruby/profiler/Profiler.cc Mon Aug 03 11:39:08 2009 -0500
@@ -52,7 +52,6 @@
*/
#include "mem/ruby/profiler/Profiler.hh"
-#include "mem/ruby/profiler/CacheProfiler.hh"
#include "mem/ruby/profiler/AddressProfiler.hh"
#include "mem/ruby/system/System.hh"
#include "mem/ruby/network/Network.hh"
@@ -73,27 +72,13 @@
static double process_memory_resident();
Profiler::Profiler(const string & name)
- : m_conflicting_histogram(-1)
{
m_name = name;
m_requestProfileMap_ptr = new Map<string, int>;
- m_L1D_cache_profiler_ptr = new CacheProfiler("L1D_cache");
- m_L1I_cache_profiler_ptr = new CacheProfiler("L1I_cache");
-
- m_L2_cache_profiler_ptr = new CacheProfiler("L2_cache");
m_inst_profiler_ptr = NULL;
m_address_profiler_ptr = NULL;
-/*
- m_address_profiler_ptr = new AddressProfiler;
- m_inst_profiler_ptr = NULL;
- if (m_all_instructions) {
- m_inst_profiler_ptr = new AddressProfiler;
- }
-*/
- m_conflicting_map_ptr = new Map<Address, Time>;
-
m_real_time_start_time = time(NULL); // Not reset in clearStats()
m_stats_period = 1000000; // Default
m_periodic_output_file_ptr = &cerr;
@@ -105,12 +90,7 @@
if (m_periodic_output_file_ptr != &cerr) {
delete m_periodic_output_file_ptr;
}
- delete m_address_profiler_ptr;
- delete m_L1D_cache_profiler_ptr;
- delete m_L1I_cache_profiler_ptr;
- delete m_L2_cache_profiler_ptr;
delete m_requestProfileMap_ptr;
- delete m_conflicting_map_ptr;
}
void Profiler::init(const vector<string> & argv, vector<string>
memory_control_names)
@@ -182,32 +162,24 @@
{
// FIXME - avoid the repeated code
- Vector<integer_t> perProcInstructionCount;
- perProcInstructionCount.setSize(RubySystem::getNumberOfSequencers());
-
Vector<integer_t> perProcCycleCount;
perProcCycleCount.setSize(RubySystem::getNumberOfSequencers());
for(int i=0; i < RubySystem::getNumberOfSequencers(); i++) {
- perProcInstructionCount[i] = g_system_ptr->getInstructionCount(i) -
m_instructions_executed_at_start[i] + 1;
perProcCycleCount[i] = g_system_ptr->getCycleCount(i) -
m_cycles_executed_at_start[i] + 1;
// The +1 allows us to avoid division by zero
}
integer_t total_misses = m_perProcTotalMisses.sum();
- integer_t instruction_executed = perProcInstructionCount.sum();
integer_t simics_cycles_executed = perProcCycleCount.sum();
integer_t transactions_started = m_perProcStartTransaction.sum();
integer_t transactions_ended = m_perProcEndTransaction.sum();
(*m_periodic_output_file_ptr) << "ruby_cycles: " <<
g_eventQueue_ptr->getTime()-m_ruby_start << endl;
(*m_periodic_output_file_ptr) << "total_misses: " << total_misses << " " <<
m_perProcTotalMisses << endl;
- (*m_periodic_output_file_ptr) << "instruction_executed: " <<
instruction_executed << " " << perProcInstructionCount << endl;
(*m_periodic_output_file_ptr) << "simics_cycles_executed: " <<
simics_cycles_executed << " " << perProcCycleCount << endl;
(*m_periodic_output_file_ptr) << "transactions_started: " <<
transactions_started << " " << m_perProcStartTransaction << endl;
(*m_periodic_output_file_ptr) << "transactions_ended: " <<
transactions_ended << " " << m_perProcEndTransaction << endl;
- (*m_periodic_output_file_ptr) << "L1TBE_usage: " << m_L1tbeProfile << endl;
- (*m_periodic_output_file_ptr) << "L2TBE_usage: " << m_L2tbeProfile << endl;
(*m_periodic_output_file_ptr) << "mbytes_resident: " <<
process_memory_resident() << endl;
(*m_periodic_output_file_ptr) << "mbytes_total: " << process_memory_total()
<< endl;
if (process_memory_total() > 0) {
@@ -292,7 +264,7 @@
out << "Virtual_time_in_seconds: " << seconds << endl;
out << "Virtual_time_in_minutes: " << minutes << endl;
out << "Virtual_time_in_hours: " << hours << endl;
- out << "Virtual_time_in_days: " << hours << endl;
+ out << "Virtual_time_in_days: " << days << endl;
out << endl;
out << "Ruby_current_time: " << g_eventQueue_ptr->getTime() << endl;
@@ -308,43 +280,26 @@
}
out << endl;
- if(m_num_BA_broadcasts + m_num_BA_unicasts != 0){
- out << endl;
- out << "Broadcast_percent: " <<
(float)m_num_BA_broadcasts/(m_num_BA_broadcasts+m_num_BA_unicasts) << endl;
- }
}
- Vector<integer_t> perProcInstructionCount;
Vector<integer_t> perProcCycleCount;
- Vector<double> perProcCPI;
- Vector<double> perProcMissesPerInsn;
- Vector<double> perProcInsnPerTrans;
Vector<double> perProcCyclesPerTrans;
Vector<double> perProcMissesPerTrans;
- perProcInstructionCount.setSize(RubySystem::getNumberOfSequencers());
+
perProcCycleCount.setSize(RubySystem::getNumberOfSequencers());
- perProcCPI.setSize(RubySystem::getNumberOfSequencers());
- perProcMissesPerInsn.setSize(RubySystem::getNumberOfSequencers());
-
- perProcInsnPerTrans.setSize(RubySystem::getNumberOfSequencers());
perProcCyclesPerTrans.setSize(RubySystem::getNumberOfSequencers());
perProcMissesPerTrans.setSize(RubySystem::getNumberOfSequencers());
for(int i=0; i < RubySystem::getNumberOfSequencers(); i++) {
- perProcInstructionCount[i] = g_system_ptr->getInstructionCount(i) -
m_instructions_executed_at_start[i] + 1;
perProcCycleCount[i] = g_system_ptr->getCycleCount(i) -
m_cycles_executed_at_start[i] + 1;
// The +1 allows us to avoid division by zero
- perProcCPI[i] = double(ruby_cycles)/perProcInstructionCount[i];
- perProcMissesPerInsn[i] = 1000.0 * (double(m_perProcTotalMisses[i]) /
double(perProcInstructionCount[i]));
int trans = m_perProcEndTransaction[i];
if (trans == 0) {
- perProcInsnPerTrans[i] = 0;
perProcCyclesPerTrans[i] = 0;
perProcMissesPerTrans[i] = 0;
} else {
- perProcInsnPerTrans[i] = perProcInstructionCount[i] / double(trans);
perProcCyclesPerTrans[i] = ruby_cycles / double(trans);
perProcMissesPerTrans[i] = m_perProcTotalMisses[i] / double(trans);
}
@@ -353,12 +308,10 @@
integer_t total_misses = m_perProcTotalMisses.sum();
integer_t user_misses = m_perProcUserMisses.sum();
integer_t supervisor_misses = m_perProcSupervisorMisses.sum();
- integer_t instruction_executed = perProcInstructionCount.sum();
integer_t simics_cycles_executed = perProcCycleCount.sum();
integer_t transactions_started = m_perProcStartTransaction.sum();
integer_t transactions_ended = m_perProcEndTransaction.sum();
- double instructions_per_transaction = (transactions_ended != 0) ?
double(instruction_executed) / double(transactions_ended) : 0;
double cycles_per_transaction = (transactions_ended != 0) ?
(RubySystem::getNumberOfSequencers() * double(ruby_cycles)) /
double(transactions_ended) : 0;
double misses_per_transaction = (transactions_ended != 0) ?
double(total_misses) / double(transactions_ended) : 0;
@@ -367,23 +320,15 @@
out << "user_misses: " << user_misses << " " << m_perProcUserMisses << endl;
out << "supervisor_misses: " << supervisor_misses << " " <<
m_perProcSupervisorMisses << endl;
out << endl;
- out << "instruction_executed: " << instruction_executed << " " <<
perProcInstructionCount << endl;
out << "ruby_cycles_executed: " << simics_cycles_executed << " " <<
perProcCycleCount << endl;
- out << "cycles_per_instruction: " <<
(RubySystem::getNumberOfSequencers()*double(ruby_cycles))/double(instruction_executed)
<< " " << perProcCPI << endl;
- out << "misses_per_thousand_instructions: " << 1000.0 *
(double(total_misses) / double(instruction_executed)) << " " <<
perProcMissesPerInsn << endl;
out << endl;
out << "transactions_started: " << transactions_started << " " <<
m_perProcStartTransaction << endl;
out << "transactions_ended: " << transactions_ended << " " <<
m_perProcEndTransaction << endl;
- out << "instructions_per_transaction: " << instructions_per_transaction << "
" << perProcInsnPerTrans << endl;
out << "cycles_per_transaction: " << cycles_per_transaction << " " <<
perProcCyclesPerTrans << endl;
out << "misses_per_transaction: " << misses_per_transaction << " " <<
perProcMissesPerTrans << endl;
out << endl;
- // m_L1D_cache_profiler_ptr->printStats(out);
- // m_L1I_cache_profiler_ptr->printStats(out);
- // m_L2_cache_profiler_ptr->printStats(out);
-
out << endl;
vector<string>::iterator it;
@@ -409,7 +354,7 @@
if (m_memReq || m_memRefresh) { // if there's a memory controller at all
long long int total_stalls = m_memInputQ + m_memBankQ + m_memWaitCycles;
double stallsPerReq = total_stalls * 1.0 / m_memReq;
- out << "Memory control:" << endl;
+ out << "Memory control " << (*it) << ":" << endl;
out << " memory_total_requests: " << m_memReq << endl; // does not
include refreshes
out << " memory_reads: " << m_memRead << endl;
out << " memory_writes: " << m_memWrite << endl;
@@ -463,12 +408,7 @@
out << "Busy Bank Count:" << m_busyBankCount << endl;
out << endl;
- out << "L1TBE_usage: " << m_L1tbeProfile << endl;
- out << "L2TBE_usage: " << m_L2tbeProfile << endl;
- out << "StopTable_usage: " << m_stopTableProfile << endl;
out << "sequencer_requests_outstanding: " << m_sequencer_requests << endl;
- out << "store_buffer_size: " << m_store_buffer_size << endl;
- out << "unique_blocks_in_store_buffer: " << m_store_buffer_blocks << endl;
out << endl;
}
@@ -486,7 +426,6 @@
out << "miss_latency_" << GenericMachineType(i) << ": " <<
m_machLatencyHistograms[i] << endl;
}
}
- out << "miss_latency_L2Miss: " << m_L2MissLatencyHistogram << endl;
_______________________________________________
m5-dev mailing list
[email protected]
http://m5sim.org/mailman/listinfo/m5-dev