changeset ed9d773de88f in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=ed9d773de88f
description:
X86: Implement SHLD.
diffstat:
2 files changed, 48 insertions(+), 2 deletions(-)
src/arch/x86/isa/decoder/two_byte_opcodes.isa | 4
src/arch/x86/isa/insts/general_purpose/rotate_and_shift/shift.py | 46
++++++++++
diffs (70 lines):
diff -r b9ab1b56391b -r ed9d773de88f
src/arch/x86/isa/decoder/two_byte_opcodes.isa
--- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa Fri Aug 07 10:13:20
2009 -0700
+++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa Fri Aug 07 10:13:24
2009 -0700
@@ -820,8 +820,8 @@
Rdx = result.rdx;
}});
0x3: Inst::BT(Ev,Gv);
- 0x4: shld_Ev_Gv_Ib();
- 0x5: shld_Ev_Gv_rCl();
+ 0x4: Inst::SHLD(Ev,Gv,Ib);
+ 0x5: Inst::SHLD(Ev,Gv);
0x6: xbts_and_cmpxchg();
0x7: ibts_and_cmpxchg();
}
diff -r b9ab1b56391b -r ed9d773de88f
src/arch/x86/isa/insts/general_purpose/rotate_and_shift/shift.py
--- a/src/arch/x86/isa/insts/general_purpose/rotate_and_shift/shift.py Fri Aug
07 10:13:20 2009 -0700
+++ b/src/arch/x86/isa/insts/general_purpose/rotate_and_shift/shift.py Fri Aug
07 10:13:24 2009 -0700
@@ -114,6 +114,52 @@
st t1, seg, riprel, disp
};
+def macroop SHLD_R_R
+{
+ mdbi regm, 0
+ sld reg, reg, rcx, flags=(CF,OF,SF,ZF,PF)
+};
+
+def macroop SHLD_M_R
+{
+ ldst t1, seg, sib, disp
+ mdbi reg, 0
+ sld t1, t1, rcx, flags=(CF,OF,SF,ZF,PF)
+ st t1, seg, sib, disp
+};
+
+def macroop SHLD_P_R
+{
+ rdip t7
+ ldst t1, seg, riprel, disp
+ mdbi reg, 0
+ sld t1, t1, rcx, flags=(CF,OF,SF,ZF,PF)
+ st t1, seg, riprel, disp
+};
+
+def macroop SHLD_R_R_I
+{
+ mdbi regm, 0
+ sldi reg, reg, imm, flags=(CF,OF,SF,ZF,PF)
+};
+
+def macroop SHLD_M_R_I
+{
+ ldst t1, seg, sib, disp
+ mdbi reg, 0
+ sldi t1, t1, imm, flags=(CF,OF,SF,ZF,PF)
+ st t1, seg, sib, disp
+};
+
+def macroop SHLD_P_R_I
+{
+ rdip t7
+ ldst t1, seg, riprel, disp
+ mdbi reg, 0
+ sldi t1, t1, imm, flags=(CF,OF,SF,ZF,PF)
+ st t1, seg, riprel, disp
+};
+
def macroop SHR_R_I
{
srli reg, reg, imm, flags=(CF,OF,SF,ZF,PF)
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