Thanks for your interest. The following wiki pages should give you more background on what's going on.
This is a page about ISA descriptions in general and should answer your specific question. http://m5sim.org/wiki/index.php/ISA_description_system These are pages about different aspects of x86's implementation in M5. A few are a little out of date in places, but you should still be able to get a better understanding of how things are done. http://m5sim.org/wiki/index.php/X86_microop_ISA http://m5sim.org/wiki/index.php/Microcode_assembler http://m5sim.org/wiki/index.php/X86_decoder http://m5sim.org/wiki/index.php/X86_microcode_system http://m5sim.org/wiki/index.php/X86 Gabe Srđan Stipić wrote: > Hi. > > I want to implement some missing instructions in x86 part of M5 simulator. > I was looking in the code: > one_byte_opcodes.isa > two_type_opcodes.isa > > There is one thing that I don't understand. > The instructions are defined in at least 3 different ways: > > 1. 0x7: Inst::XORPD(Vq,Wq); /* this have Inst:: */ > 2. 0x0: CMOVS(Gv,Ev); /* this doesn't have Inst:: */ > > 3. > default: MultiInst::AND(OPCODE_OP_BOTTOM3, > [Eb,Gb], [Ev,Gv], > [Gb,Eb], [Gv,Ev], > [rAb,Ib], [rAv,Iz]); > > /* and later */ > 0x4: AND(Eb,Ib); > > Can somebody explain me when I have to implement instruction with > 'Inst::', 'MultiInst::' or without prefix. > > Tnx, > Srdjan > _______________________________________________ > m5-dev mailing list > [email protected] > http://m5sim.org/mailman/listinfo/m5-dev > _______________________________________________ m5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/m5-dev
