changeset b19a86a6d424 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=b19a86a6d424
description:
X86: Turn the CMPXCHG8B microcode into a template and generate each
variant.
diffstat:
1 file changed, 40 insertions(+), 94 deletions(-)
src/arch/x86/isa/insts/general_purpose/semaphores.py | 134 +++++-------------
diffs (151 lines):
diff -r 67f07e24dc7d -r b19a86a6d424
src/arch/x86/isa/insts/general_purpose/semaphores.py
--- a/src/arch/x86/isa/insts/general_purpose/semaphores.py Mon Aug 17
00:21:57 2009 -0700
+++ b/src/arch/x86/isa/insts/general_purpose/semaphores.py Mon Aug 17
18:15:00 2009 -0700
@@ -98,100 +98,6 @@
mov rax, rax, t1, flags=(nCZF,)
};
-def macroop CMPXCHG8B_M {
- lea t1, seg, sib, disp, dataSize=asz
- ldst t2, seg, [1, t0, t1], 0
- ldst t3, seg, [1, t0, t1], dsz
-
- sub t0, rax, t2, flags=(ZF,)
- br label("doneComparing"), flags=(nCZF,)
- sub t0, rdx, t3, flags=(ZF,)
-doneComparing:
-
- # If they're equal, set t3:t2 to rbx:rcx to write to memory
- mov t2, t2, rbx, flags=(CZF,)
- mov t3, t3, rcx, flags=(CZF,)
-
- # If they're not equal, set rdx:rax to the value from memory.
- mov rax, rax, t2, flags=(nCZF,)
- mov rdx, rdx, t3, flags=(nCZF,)
-
- # Write to memory
- st t3, seg, [1, t0, t1], dsz
- st t2, seg, [1, t0, t1], 0
-};
-
-def macroop CMPXCHG8B_P {
- rdip t7
- lea t1, seg, riprel, disp, dataSize=asz
- ldst t2, seg, [1, t0, t1], 0
- ldst t3, seg, [1, t0, t1], dsz
-
- sub t0, rax, t2, flags=(ZF,)
- br label("doneComparing"), flags=(nCZF,)
- sub t0, rdx, t3, flags=(ZF,)
-doneComparing:
-
- # If they're equal, set t3:t2 to rbx:rcx to write to memory
- mov t2, t2, rbx, flags=(CZF,)
- mov t3, t3, rcx, flags=(CZF,)
-
- # If they're not equal, set rdx:rax to the value from memory.
- mov rax, rax, t2, flags=(nCZF,)
- mov rdx, rdx, t3, flags=(nCZF,)
-
- # Write to memory
- st t3, seg, [1, t0, t1], dsz
- st t2, seg, [1, t0, t1], 0
-};
-
-def macroop CMPXCHG8B_LOCKED_M {
- lea t1, seg, sib, disp, dataSize=asz
- ldstl t2, seg, [1, t0, t1], 0
- ldstl t3, seg, [1, t0, t1], dsz
-
- sub t0, rax, t2, flags=(ZF,)
- br label("doneComparing"), flags=(nCZF,)
- sub t0, rdx, t3, flags=(ZF,)
-doneComparing:
-
- # If they're equal, set t3:t2 to rbx:rcx to write to memory
- mov t2, t2, rbx, flags=(CZF,)
- mov t3, t3, rcx, flags=(CZF,)
-
- # If they're not equal, set rdx:rax to the value from memory.
- mov rax, rax, t2, flags=(nCZF,)
- mov rdx, rdx, t3, flags=(nCZF,)
-
- # Write to memory
- stul t3, seg, [1, t0, t1], dsz
- stul t2, seg, [1, t0, t1], 0
-};
-
-def macroop CMPXCHG8B_LOCKED_P {
- rdip t7
- lea t1, seg, riprel, disp, dataSize=asz
- ldstl t2, seg, [1, t0, t1], 0
- ldstl t3, seg, [1, t0, t1], dsz
-
- sub t0, rax, t2, flags=(ZF,)
- br label("doneComparing"), flags=(nCZF,)
- sub t0, rdx, t3, flags=(ZF,)
-doneComparing:
-
- # If they're equal, set t3:t2 to rbx:rcx to write to memory
- mov t2, t2, rbx, flags=(CZF,)
- mov t3, t3, rcx, flags=(CZF,)
-
- # If they're not equal, set rdx:rax to the value from memory.
- mov rax, rax, t2, flags=(nCZF,)
- mov rdx, rdx, t3, flags=(nCZF,)
-
- # Write to memory
- stul t3, seg, [1, t0, t1], dsz
- stul t2, seg, [1, t0, t1], 0
-};
-
def macroop XADD_M_R {
ldst t1, seg, sib, disp
add t2, t1, reg, flags=(OF,SF,ZF,AF,PF,CF)
@@ -229,6 +135,46 @@
};
'''
+
+cmpxchg8bCode = '''
+def macroop CMPXCHG8B_%(suffix)s {
+ %(rdip)s
+ lea t1, seg, %(sib)s, disp, dataSize=asz
+ ldst%(l)s t2, seg, [1, t0, t1], 0
+ ldst%(l)s t3, seg, [1, t0, t1], dsz
+
+ sub t0, rax, t2, flags=(ZF,)
+ br label("doneComparing"), flags=(nCZF,)
+ sub t0, rdx, t3, flags=(ZF,)
+doneComparing:
+
+ # If they're equal, set t3:t2 to rbx:rcx to write to memory
+ mov t2, t2, rbx, flags=(CZF,)
+ mov t3, t3, rcx, flags=(CZF,)
+
+ # If they're not equal, set rdx:rax to the value from memory.
+ mov rax, rax, t2, flags=(nCZF,)
+ mov rdx, rdx, t3, flags=(nCZF,)
+
+ # Write to memory
+ st%(ul)s t3, seg, [1, t0, t1], dsz
+ st%(ul)s t2, seg, [1, t0, t1], 0
+};
+'''
+
+microcode += cmpxchg8bCode % {"rdip": "", "sib": "sib",
+ "l": "", "ul": "",
+ "suffix": "M"}
+microcode += cmpxchg8bCode % {"rdip": "rdip t7", "sib": "riprel",
+ "l": "", "ul": "",
+ "suffix": "P"}
+microcode += cmpxchg8bCode % {"rdip": "", "sib": "sib",
+ "l": "l", "ul": "ul",
+ "suffix": "LOCKED_M"}
+microcode += cmpxchg8bCode % {"rdip": "rdip t7", "sib": "riprel",
+ "l": "l", "ul": "ul",
+ "suffix": "LOCKED_P"}
+
#let {{
# class XCHG(Inst):
# "GenFault ${new UnimpInstFault}"
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