changeset 1ad4a7774b3c in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=1ad4a7774b3c
description:
X86: Use suffixes to differentiate XMM/MMX/GPR operands.
diffstat:
11 files changed, 61 insertions(+), 44 deletions(-)
src/arch/x86/isa/insts/simd128/floating_point/arithmetic/addition.py
| 6 +-
src/arch/x86/isa/insts/simd128/floating_point/arithmetic/division.py
| 6 +-
src/arch/x86/isa/insts/simd128/floating_point/arithmetic/multiplication.py
| 6 +-
src/arch/x86/isa/insts/simd128/floating_point/arithmetic/square_root.py
| 6 +-
src/arch/x86/isa/insts/simd128/floating_point/arithmetic/subtraction.py
| 6 +-
src/arch/x86/isa/insts/simd128/floating_point/compare/compare_and_write_rflags.py
| 6 +-
src/arch/x86/isa/insts/simd128/floating_point/data_conversion/convert_floating_point_to_gpr_integer.py
| 2
src/arch/x86/isa/insts/simd128/floating_point/data_transfer/move.py
| 30 +++++-----
src/arch/x86/isa/insts/simd128/floating_point/logical/exclusive_or.py
| 6 +-
src/arch/x86/isa/insts/simd128/integer/data_conversion/convert_gpr_integer_to_floating_point.py
| 6 +-
src/arch/x86/isa/specialize.isa
| 25 +++++++-
diffs (truncated from 355 to 300 lines):
diff -r 584314d07394 -r 1ad4a7774b3c
src/arch/x86/isa/insts/simd128/floating_point/arithmetic/addition.py
--- a/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/addition.py
Mon Aug 17 18:15:19 2009 -0700
+++ b/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/addition.py
Mon Aug 17 18:15:21 2009 -0700
@@ -58,16 +58,16 @@
# ADDPD
# ADDSS
-def macroop ADDSD_R_R {
+def macroop ADDSD_XMM_XMM {
addfp xmml, xmml, xmmlm
};
-def macroop ADDSD_R_M {
+def macroop ADDSD_XMM_M {
ldfp ufp1, seg, sib, disp
addfp xmml, xmml, ufp1
};
-def macroop ADDSD_R_P {
+def macroop ADDSD_XMM_P {
rdip t7
ldfp ufp1, seg, riprel, disp
addfp xmml, xmml, ufp1
diff -r 584314d07394 -r 1ad4a7774b3c
src/arch/x86/isa/insts/simd128/floating_point/arithmetic/division.py
--- a/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/division.py
Mon Aug 17 18:15:19 2009 -0700
+++ b/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/division.py
Mon Aug 17 18:15:21 2009 -0700
@@ -58,16 +58,16 @@
# DIVPD
# DIVSS
-def macroop DIVSD_R_R {
+def macroop DIVSD_XMM_XMM {
divfp xmml, xmml, xmmlm
};
-def macroop DIVSD_R_M {
+def macroop DIVSD_XMM_M {
ldfp ufp1, seg, sib, disp
divfp xmml, xmml, ufp1
};
-def macroop DIVSD_R_P {
+def macroop DIVSD_XMM_P {
rdip t7
ldfp ufp1, seg, riprel, disp
divfp xmml, xmml, ufp1
diff -r 584314d07394 -r 1ad4a7774b3c
src/arch/x86/isa/insts/simd128/floating_point/arithmetic/multiplication.py
---
a/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/multiplication.py
Mon Aug 17 18:15:19 2009 -0700
+++
b/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/multiplication.py
Mon Aug 17 18:15:21 2009 -0700
@@ -58,16 +58,16 @@
# MULPD
# MULSS
-def macroop MULSD_R_R {
+def macroop MULSD_XMM_XMM {
mulfp xmml, xmml, xmmlm
};
-def macroop MULSD_R_M {
+def macroop MULSD_XMM_M {
ldfp ufp1, seg, sib, disp
mulfp xmml, xmml, ufp1
};
-def macroop MULSD_R_P {
+def macroop MULSD_XMM_P {
rdip t7
ldfp ufp1, seg, riprel, disp
mulfp xmml, xmml, ufp1
diff -r 584314d07394 -r 1ad4a7774b3c
src/arch/x86/isa/insts/simd128/floating_point/arithmetic/square_root.py
--- a/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/square_root.py
Mon Aug 17 18:15:19 2009 -0700
+++ b/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/square_root.py
Mon Aug 17 18:15:21 2009 -0700
@@ -58,16 +58,16 @@
# SQRTPD
# SQRTSS
-def macroop SQRTSD_R_R {
+def macroop SQRTSD_XMM_XMM {
sqrtfp xmml, xmml, xmmlm
};
-def macroop SQRTSD_R_M {
+def macroop SQRTSD_XMM_M {
ldfp ufp1, seg, sib, disp
sqrtfp xmml, xmml, ufp1
};
-def macroop SQRTSD_R_P {
+def macroop SQRTSD_XMM_P {
rdip t7
ldfp ufp1, seg, riprel, disp
sqrtfp xmml, xmml, ufp1
diff -r 584314d07394 -r 1ad4a7774b3c
src/arch/x86/isa/insts/simd128/floating_point/arithmetic/subtraction.py
--- a/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/subtraction.py
Mon Aug 17 18:15:19 2009 -0700
+++ b/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/subtraction.py
Mon Aug 17 18:15:21 2009 -0700
@@ -58,16 +58,16 @@
# SUBPD
# SUBSS
-def macroop SUBSD_R_R {
+def macroop SUBSD_XMM_XMM {
subfp xmml, xmml, xmmlm
};
-def macroop SUBSD_R_M {
+def macroop SUBSD_XMM_M {
ldfp ufp1, seg, sib, disp
subfp xmml, xmml, ufp1
};
-def macroop SUBSD_R_P {
+def macroop SUBSD_XMM_P {
rdip t7
ldfp ufp1, seg, riprel, disp
subfp xmml, xmml, ufp1
diff -r 584314d07394 -r 1ad4a7774b3c
src/arch/x86/isa/insts/simd128/floating_point/compare/compare_and_write_rflags.py
---
a/src/arch/x86/isa/insts/simd128/floating_point/compare/compare_and_write_rflags.py
Mon Aug 17 18:15:19 2009 -0700
+++
b/src/arch/x86/isa/insts/simd128/floating_point/compare/compare_and_write_rflags.py
Mon Aug 17 18:15:21 2009 -0700
@@ -58,16 +58,16 @@
# COMISD
# UCOMISS
-def macroop UCOMISD_R_R {
+def macroop UCOMISD_XMM_XMM {
compfp xmml, xmmlm
};
-def macroop UCOMISD_R_M {
+def macroop UCOMISD_XMM_M {
ldfp ufp1, seg, sib, disp
compfp xmml, ufp1
};
-def macroop UCOMISD_R_P {
+def macroop UCOMISD_XMM_P {
rdip t7
ldfp ufp1, seg, riprel, disp
compfp xmml, ufp1
diff -r 584314d07394 -r 1ad4a7774b3c
src/arch/x86/isa/insts/simd128/floating_point/data_conversion/convert_floating_point_to_gpr_integer.py
---
a/src/arch/x86/isa/insts/simd128/floating_point/data_conversion/convert_floating_point_to_gpr_integer.py
Mon Aug 17 18:15:19 2009 -0700
+++
b/src/arch/x86/isa/insts/simd128/floating_point/data_conversion/convert_floating_point_to_gpr_integer.py
Mon Aug 17 18:15:21 2009 -0700
@@ -58,7 +58,7 @@
# CVTSD2SI
# CVTTSS2SI
-def macroop CVTTSD2SI_R_R {
+def macroop CVTTSD2SI_R_XMM {
cvtf_d2i reg, xmmlm
};
diff -r 584314d07394 -r 1ad4a7774b3c
src/arch/x86/isa/insts/simd128/floating_point/data_transfer/move.py
--- a/src/arch/x86/isa/insts/simd128/floating_point/data_transfer/move.py
Mon Aug 17 18:15:19 2009 -0700
+++ b/src/arch/x86/isa/insts/simd128/floating_point/data_transfer/move.py
Mon Aug 17 18:15:21 2009 -0700
@@ -54,33 +54,33 @@
# Authors: Gabe Black
microcode = '''
-def macroop MOVAPS_R_M {
+def macroop MOVAPS_XMM_M {
# Check low address.
ldfp xmmh, seg, sib, "DISPLACEMENT + 8", dataSize=8
ldfp xmml, seg, sib, disp, dataSize=8
};
-def macroop MOVAPS_R_P {
+def macroop MOVAPS_XMM_P {
rdip t7
# Check low address.
ldfp xmmh, seg, riprel, "DISPLACEMENT + 8", dataSize=8
ldfp xmml, seg, riprel, disp, dataSize=8
};
-def macroop MOVAPS_M_R {
+def macroop MOVAPS_M_XMM {
# Check low address.
stfp xmmh, seg, sib, "DISPLACEMENT + 8", dataSize=8
stfp xmml, seg, sib, disp, dataSize=8
};
-def macroop MOVAPS_P_R {
+def macroop MOVAPS_P_XMM {
rdip t7
# Check low address.
stfp xmmh, seg, riprel, "DISPLACEMENT + 8", dataSize=8
stfp xmml, seg, riprel, disp, dataSize=8
};
-def macroop MOVAPS_R_R {
+def macroop MOVAPS_XMM_XMM {
# Check low address.
movfp xmml, xmmlm, dataSize=8
movfp xmmh, xmmhm, dataSize=8
@@ -93,25 +93,25 @@
# MOVHPD
# MOVLPS
-def macroop MOVLPD_R_M {
+def macroop MOVLPD_XMM_M {
ldfp xmml, seg, sib, disp, dataSize=8
};
-def macroop MOVLPD_R_P {
+def macroop MOVLPD_XMM_P {
rdip t7
ldfp xmml, seg, riprel, disp, dataSize=8
};
-def macroop MOVLPD_M_R {
+def macroop MOVLPD_M_XMM {
stfp xmml, seg, sib, disp, dataSize=8
};
-def macroop MOVLPD_P_R {
+def macroop MOVLPD_P_XMM {
rdip t7
stfp xmml, seg, riprel, disp, dataSize=8
};
-def macroop MOVLPD_R_R {
+def macroop MOVLPD_XMM_XMM {
movfp xmml, xmmlm, dataSize=8
};
@@ -119,27 +119,27 @@
# MOVLHPS
# MOVSS
-def macroop MOVSD_R_M {
+def macroop MOVSD_XMM_M {
# Zero xmmh
ldfp xmml, seg, sib, disp, dataSize=8
};
-def macroop MOVSD_R_P {
+def macroop MOVSD_XMM_P {
rdip t7
# Zero xmmh
ldfp xmml, seg, riprel, disp, dataSize=8
};
-def macroop MOVSD_M_R {
+def macroop MOVSD_M_XMM {
stfp xmml, seg, sib, disp, dataSize=8
};
-def macroop MOVSD_P_R {
+def macroop MOVSD_P_XMM {
rdip t7
stfp xmml, seg, riprel, disp, dataSize=8
};
-def macroop MOVSD_R_R {
+def macroop MOVSD_XMM_XMM {
movfp xmml, xmmlm, dataSize=8
};
'''
diff -r 584314d07394 -r 1ad4a7774b3c
src/arch/x86/isa/insts/simd128/floating_point/logical/exclusive_or.py
--- a/src/arch/x86/isa/insts/simd128/floating_point/logical/exclusive_or.py
Mon Aug 17 18:15:19 2009 -0700
+++ b/src/arch/x86/isa/insts/simd128/floating_point/logical/exclusive_or.py
Mon Aug 17 18:15:21 2009 -0700
@@ -56,19 +56,19 @@
microcode = '''
# XORPS
-def macroop XORPD_R_R {
+def macroop XORPD_XMM_XMM {
xorfp xmml, xmml, xmmlm
xorfp xmmh, xmmh, xmmhm
};
-def macroop XORPD_R_M {
+def macroop XORPD_XMM_M {
ldfp ufp1, seg, sib, disp
ldfp ufp2, seg, sib, "DISPLACEMENT + 8"
xorfp xmml, xmml, ufp1
xorfp xmmh, xmmh, ufp2
};
-def macroop XORPD_R_P {
+def macroop XORPD_XMM_P {
rdip t7
ldfp ufp1, seg, riprel, disp
ldfp ufp2, seg, riprel, "DISPLACEMENT + 8"
diff -r 584314d07394 -r 1ad4a7774b3c
src/arch/x86/isa/insts/simd128/integer/data_conversion/convert_gpr_integer_to_floating_point.py
---
a/src/arch/x86/isa/insts/simd128/integer/data_conversion/convert_gpr_integer_to_floating_point.py
Mon Aug 17 18:15:19 2009 -0700
+++
b/src/arch/x86/isa/insts/simd128/integer/data_conversion/convert_gpr_integer_to_floating_point.py
Mon Aug 17 18:15:21 2009 -0700
@@ -56,16 +56,16 @@
microcode = '''
# CVTSI2SS
-def macroop CVTSI2SD_R_R {
+def macroop CVTSI2SD_XMM_R {
cvtf_i2d xmml, regm
};
-def macroop CVTSI2SD_R_M {
+def macroop CVTSI2SD_XMM_M {
ld t1, seg, sib, disp
cvtf_i2d xmml, t1
};
_______________________________________________
m5-dev mailing list
[email protected]
http://m5sim.org/mailman/listinfo/m5-dev
