changeset c256e28ad056 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=c256e28ad056
description:
X86: Implement the versions of PUNPCKLBW that use MMX registers.
diffstat:
2 files changed, 16 insertions(+), 3 deletions(-)
src/arch/x86/isa/decoder/two_byte_opcodes.isa
| 2 -
src/arch/x86/isa/insts/simd64/integer/data_reordering/unpack_and_interleave.py
| 17 ++++++++--
diffs (41 lines):
diff -r ff5e7e6bcfbd -r c256e28ad056
src/arch/x86/isa/decoder/two_byte_opcodes.isa
--- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa Mon Aug 17 18:15:39
2009 -0700
+++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa Mon Aug 17 18:15:42
2009 -0700
@@ -551,7 +551,7 @@
0x0C: decode LEGACY_DECODEVAL {
// no prefix
0x0: decode OPCODE_OP_BOTTOM3 {
- 0x0: punpcklbw_Pq_Qd();
+ 0x0: Inst::PUNPCKLBW(Pq,Qd);
0x1: punpcklwd_Pq_Qd();
0x2: punpckldq_Pq_Qd();
0x3: packsswb_Pq_Qq();
diff -r ff5e7e6bcfbd -r c256e28ad056
src/arch/x86/isa/insts/simd64/integer/data_reordering/unpack_and_interleave.py
---
a/src/arch/x86/isa/insts/simd64/integer/data_reordering/unpack_and_interleave.py
Mon Aug 17 18:15:39 2009 -0700
+++
b/src/arch/x86/isa/insts/simd64/integer/data_reordering/unpack_and_interleave.py
Mon Aug 17 18:15:42 2009 -0700
@@ -54,10 +54,23 @@
# Authors: Gabe Black
microcode = '''
+def macroop PUNPCKLBW_MMX_MMX {
+ unpack mmx, mmx, mmxm, sel=0, size=1
+};
+
+def macroop PUNPCKLBW_MMX_M {
+ ldfp ufp1, seg, sib, disp, dataSize=8
+ unpack mmx, mmx, ufp1, sel=0, size=1
+};
+
+def macroop PUNPCKLBW_MMX_P {
+ rdip t7
+ ldfp ufp1, seg, riprel, disp, dataSize=8
+ unpack mmx, mmx, ufp1, sel=0, size=1
+};
+'''
# PUNPCKHBW
# PUNPCKHWD
# PUNPCKHDQ
-# PUNPCKLBW
# PUNPCKLWD
# PUNPCKLDQ
-'''
_______________________________________________
m5-dev mailing list
[email protected]
http://m5sim.org/mailman/listinfo/m5-dev
