changeset dc54f4fd6116 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=dc54f4fd6116
description:
        X86: Implement PXOR.

diffstat:

3 files changed, 37 insertions(+), 4 deletions(-)
src/arch/x86/isa/decoder/two_byte_opcodes.isa                  |    4 -
src/arch/x86/isa/insts/simd128/integer/logical/exclusive_or.py |   22 +++++++++-
src/arch/x86/isa/insts/simd64/integer/logical/exclusive_or.py  |   15 ++++++

diffs (74 lines):

diff -r b595412884f9 -r dc54f4fd6116 
src/arch/x86/isa/decoder/two_byte_opcodes.isa
--- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa     Mon Aug 17 18:22:37 
2009 -0700
+++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa     Mon Aug 17 18:23:04 
2009 -0700
@@ -1050,7 +1050,7 @@
                     0x4: paddsb_Pq_Qq();
                     0x5: paddsw_Pq_Qq();
                     0x6: pmaxsw_Pq_Qq();
-                    0x7: pxor_Pq_Qq();
+                    0x7: Inst::PXOR(Pq,Qq);
                 }
                 // operand size (0x66)
                 0x1: decode OPCODE_OP_BOTTOM3 {
@@ -1061,7 +1061,7 @@
                     0x4: paddsb_Vo_Wo();
                     0x5: paddsw_Vo_Wo();
                     0x6: pmaxsw_Vo_Wo();
-                    0x7: pxor_Vo_Wo();
+                    0x7: Inst::PXOR(Vo,Wo);
                 }
                 default: Inst::UD2();
             }
diff -r b595412884f9 -r dc54f4fd6116 
src/arch/x86/isa/insts/simd128/integer/logical/exclusive_or.py
--- a/src/arch/x86/isa/insts/simd128/integer/logical/exclusive_or.py    Mon Aug 
17 18:22:37 2009 -0700
+++ b/src/arch/x86/isa/insts/simd128/integer/logical/exclusive_or.py    Mon Aug 
17 18:23:04 2009 -0700
@@ -54,5 +54,25 @@
 # Authors: Gabe Black
 
 microcode = '''
-# PXOR
+def macroop PXOR_XMM_XMM {
+    mxor xmml, xmml, xmmlm
+    mxor xmmh, xmmh, xmmhm
+};
+
+def macroop PXOR_XMM_M {
+    lea t1, seg, sib, disp, dataSize=asz
+    ldfp ufp1, seg, [1, t0, t1], dataSize=8
+    ldfp ufp2, seg, [1, t0, t1], 8, dataSize=8
+    mxor xmml, xmml, ufp1
+    mxor xmmh, xmmh, ufp2
+};
+
+def macroop PXOR_XMM_P {
+    rdip t7
+    lea t1, seg, riprel, disp, dataSize=asz
+    ldfp ufp1, seg, [1, t0, t1], dataSize=8
+    ldfp ufp2, seg, [1, t0, t1], 8, dataSize=8
+    mxor xmml, xmml, ufp1
+    mxor xmmh, xmmh, ufp2
+};
 '''
diff -r b595412884f9 -r dc54f4fd6116 
src/arch/x86/isa/insts/simd64/integer/logical/exclusive_or.py
--- a/src/arch/x86/isa/insts/simd64/integer/logical/exclusive_or.py     Mon Aug 
17 18:22:37 2009 -0700
+++ b/src/arch/x86/isa/insts/simd64/integer/logical/exclusive_or.py     Mon Aug 
17 18:23:04 2009 -0700
@@ -54,5 +54,18 @@
 # Authors: Gabe Black
 
 microcode = '''
-# PXOR
+def macroop PXOR_MMX_MMX {
+    mxor mmx, mmx, mmxm
+};
+
+def macroop PXOR_MMX_M {
+    ldfp ufp1, seg, sib, disp, dataSize=8
+    mxor mmx, mmx, ufp1
+};
+
+def macroop PXOR_MMX_P {
+    rdip t7
+    ldfp ufp1, seg, riprel, disp, dataSize=8
+    mxor mmx, mmx, ufp1
+};
 '''
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