changeset dae81a15cfcc in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=dae81a15cfcc
description:
        X86: Implement the floating point media add instructions.

diffstat:

2 files changed, 60 insertions(+), 9 deletions(-)
src/arch/x86/isa/decoder/two_byte_opcodes.isa                        |    6 
src/arch/x86/isa/insts/simd128/floating_point/arithmetic/addition.py |   63 
+++++++++-

diffs (113 lines):

diff -r 22cb3c1ea3fb -r dae81a15cfcc 
src/arch/x86/isa/decoder/two_byte_opcodes.isa
--- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa     Mon Aug 17 18:35:04 
2009 -0700
+++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa     Mon Aug 17 18:35:06 
2009 -0700
@@ -504,7 +504,7 @@
             0x0B: decode LEGACY_DECODEVAL {
                 // no prefix
                 0x0: decode OPCODE_OP_BOTTOM3 {
-                    0x0: addps_Vo_Wo();
+                    0x0: Inst::ADDPS(Vo,Wo);
                     0x1: mulps_Vo_Wo();
                     0x2: cvtps2pd_Vo_Wq();
                     0x3: cvtdq2ps_Vo_Wo();
@@ -515,7 +515,7 @@
                 }
                 // repe (0xF3)
                 0x4: decode OPCODE_OP_BOTTOM3 {
-                    0x0: addss_Vd_Wd();
+                    0x0: Inst::ADDSS(Vd,Wd);
                     0x1: mulss_Vd_Wd();
                     0x2: cvtss2sd_Vq_Wd();
                     0x3: cvttps2dq_Vo_Wo();
@@ -526,7 +526,7 @@
                 }
                 // operand size (0x66)
                 0x1: decode OPCODE_OP_BOTTOM3 {
-                    0x0: addpd_Vo_Wo();
+                    0x0: Inst::ADDPD(Vo,Wo);
                     0x1: mulpd_Vo_Wo();
                     0x2: cvtpd2ps_Vo_Wo();
                     0x3: cvtps2dq_Vo_Wo();
diff -r 22cb3c1ea3fb -r dae81a15cfcc 
src/arch/x86/isa/insts/simd128/floating_point/arithmetic/addition.py
--- a/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/addition.py      
Mon Aug 17 18:35:04 2009 -0700
+++ b/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/addition.py      
Mon Aug 17 18:35:06 2009 -0700
@@ -54,22 +54,73 @@
 # Authors: Gabe Black
 
 microcode = '''
-# ADDPS
-# ADDPD
-# ADDSS
+def macroop ADDSS_XMM_XMM {
+    maddf xmml, xmml, xmmlm, size=4, ext=1
+};
+
+def macroop ADDSS_XMM_M {
+    ldfp ufp1, seg, sib, disp, dataSize=8
+    maddf xmml, xmml, ufp1, size=4, ext=1
+};
+
+def macroop ADDSS_XMM_P {
+    rdip t7
+    ldfp ufp1, seg, riprel, disp, dataSize=8
+    maddf xmml, xmml, ufp1, size=4, ext=1
+};
 
 def macroop ADDSD_XMM_XMM {
-    addfp xmml, xmml, xmmlm
+    maddf xmml, xmml, xmmlm, size=8, ext=1
 };
 
 def macroop ADDSD_XMM_M {
     ldfp ufp1, seg, sib, disp, dataSize=8
-    addfp xmml, xmml, ufp1
+    maddf xmml, xmml, ufp1, size=8, ext=1
 };
 
 def macroop ADDSD_XMM_P {
     rdip t7
     ldfp ufp1, seg, riprel, disp, dataSize=8
-    addfp xmml, xmml, ufp1
+    maddf xmml, xmml, ufp1, size=8, ext=1
+};
+
+def macroop ADDPS_XMM_XMM {
+    maddf xmml, xmml, xmmlm, size=4, ext=0
+    maddf xmmh, xmmh, xmmhm, size=4, ext=0
+};
+
+def macroop ADDPS_XMM_M {
+    ldfp ufp1, seg, sib, "DISPLACEMENT", dataSize=8
+    ldfp ufp2, seg, sib, "DISPLACEMENT + 8", dataSize=8
+    maddf xmml, xmml, ufp1, size=4, ext=0
+    maddf xmmh, xmmh, ufp2, size=4, ext=0
+};
+
+def macroop ADDPS_XMM_P {
+    rdip t7
+    ldfp ufp1, seg, riprel, "DISPLACEMENT", dataSize=8
+    ldfp ufp2, seg, riprel, "DISPLACEMENT + 8", dataSize=8
+    maddf xmml, xmml, ufp1, size=4, ext=0
+    maddf xmmh, xmmh, ufp2, size=4, ext=0
+};
+
+def macroop ADDPD_XMM_XMM {
+    maddf xmml, xmml, xmmlm, size=8, ext=0
+    maddf xmmh, xmmh, xmmhm, size=8, ext=0
+};
+
+def macroop ADDPD_XMM_M {
+    ldfp ufp1, seg, sib, "DISPLACEMENT", dataSize=8
+    ldfp ufp2, seg, sib, "DISPLACEMENT + 8", dataSize=8
+    maddf xmml, xmml, ufp1, size=8, ext=0
+    maddf xmmh, xmmh, ufp2, size=8, ext=0
+};
+
+def macroop ADDPD_XMM_P {
+    rdip t7
+    ldfp ufp1, seg, riprel, "DISPLACEMENT", dataSize=8
+    ldfp ufp2, seg, riprel, "DISPLACEMENT + 8", dataSize=8
+    maddf xmml, xmml, ufp1, size=8, ext=0
+    maddf xmmh, xmmh, ufp2, size=8, ext=0
 };
 '''
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