changeset b0cef5e2dfdb in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=b0cef5e2dfdb
description:
X86: Add a media integer min microop.
diffstat:
1 file changed, 38 insertions(+)
src/arch/x86/isa/microops/mediaop.isa | 38 +++++++++++++++++++++++++++++++++
diffs (48 lines):
diff -r 91d9599956f3 -r b0cef5e2dfdb src/arch/x86/isa/microops/mediaop.isa
--- a/src/arch/x86/isa/microops/mediaop.isa Mon Aug 17 20:04:02 2009 -0700
+++ b/src/arch/x86/isa/microops/mediaop.isa Mon Aug 17 20:04:02 2009 -0700
@@ -530,6 +530,44 @@
FpDestReg.uqw = result;
'''
+ class Mmini(MediaOp):
+ code = '''
+
+ assert(srcSize == destSize);
+ int size = srcSize;
+ int sizeBits = size * 8;
+ int items = (ext & 0x1) ? 1: (sizeof(FloatRegBits) / size);
+ uint64_t result = FpDestReg.uqw;
+
+ for (int i = 0; i < items; i++) {
+ int hiIndex = (i + 1) * sizeBits - 1;
+ int loIndex = (i + 0) * sizeBits;
+ uint64_t arg1Bits = bits(FpSrcReg1.uqw, hiIndex, loIndex);
+ int64_t arg1 = arg1Bits |
+ (0 - (arg1Bits & (1 << (sizeBits - 1))));
+ uint64_t arg2Bits = bits(FpSrcReg2.uqw, hiIndex, loIndex);
+ int64_t arg2 = arg2Bits |
+ (0 - (arg2Bits & (1 << (sizeBits - 1))));
+ uint64_t resBits;
+
+ if (ext & 0x2) {
+ if (arg1 < arg2) {
+ resBits = arg1Bits;
+ } else {
+ resBits = arg2Bits;
+ }
+ } else {
+ if (arg1Bits < arg2Bits) {
+ resBits = arg1Bits;
+ } else {
+ resBits = arg2Bits;
+ }
+ }
+ result = insertBits(result, hiIndex, loIndex, resBits);
+ }
+ FpDestReg.uqw = result;
+ '''
+
class Msqrt(MediaOp):
def __init__(self, dest, src, \
size = None, destSize = None, srcSize = None, ext = None):
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