changeset e0c1c6d87649 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=e0c1c6d87649
description:
Merge with head.
diffstat:
2 files changed, 4 insertions(+), 4 deletions(-)
src/arch/x86/insts/microldstop.hh | 4 ++--
src/arch/x86/isa/microops/mediaop.isa | 4 ++--
diffs (28 lines):
diff -r b157ef23d76c -r e0c1c6d87649 src/arch/x86/insts/microldstop.hh
--- a/src/arch/x86/insts/microldstop.hh Sun Aug 23 14:16:58 2009 -0700
+++ b/src/arch/x86/insts/microldstop.hh Sun Aug 23 14:19:14 2009 -0700
@@ -64,8 +64,8 @@
namespace X86ISA
{
- static const Request::FlagsType SegmentFlagMask = mask(4);
- static const int FlagShift = 4;
+ const Request::FlagsType SegmentFlagMask = mask(4);
+ const int FlagShift = 4;
enum FlagBit {
CPL0FlagBit = 1,
AddrSizeFlagBit = 2,
diff -r b157ef23d76c -r e0c1c6d87649 src/arch/x86/isa/microops/mediaop.isa
--- a/src/arch/x86/isa/microops/mediaop.isa Sun Aug 23 14:16:58 2009 -0700
+++ b/src/arch/x86/isa/microops/mediaop.isa Sun Aug 23 14:19:14 2009 -0700
@@ -1406,8 +1406,8 @@
(0 - (arg2Bits & (1 << (sizeBits - 1))));
uint64_t resBits = 0;
- if ((ext & 0x2) == 0 && arg1 == arg2 ||
- (ext & 0x2) == 0x2 && arg1 > arg2)
+ if (((ext & 0x2) == 0 && arg1 == arg2) ||
+ ((ext & 0x2) == 0x2 && arg1 > arg2))
resBits = mask(sizeBits);
result = insertBits(result, hiIndex, loIndex, resBits);
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