# HG changeset patch
# User Korey Sewell <[email protected]>
# Date 1251991492 14400
# Node ID 2cbb826e9ca006cad820ba2be85eeea1da7fd2f9
# Parent e0c1c6d876499dc536cfdf0cd37736051f1fb760
cpus: make commit count naming consistent across all cpus
move all common cpu commit counts to base cpu
-numInsts => total number of insts. committed
-numInstsPerThread=> per thread instruction commits
a similar naming scheme is used for:
cpi, cpiPerThread, ipc, and ipcPerThread
diff -r e0c1c6d87649 -r 2cbb826e9ca0 src/cpu/base.cc
--- a/src/cpu/base.cc Sun Aug 23 14:19:14 2009 -0700
+++ b/src/cpu/base.cc Thu Sep 03 11:24:52 2009 -0400
@@ -246,12 +246,48 @@
BaseCPU::regStats()
{
using namespace Stats;
-
+
numCycles
.name(name() + ".numCycles")
- .desc("number of cpu cycles simulated")
+ .desc("Number of cpu cycles simulated")
;
+ numInsts
+ .name(name() + ".num_insts")
+ .desc("Number of instructions committed")
+ ;
+
+ numInstsPerThread
+ .init(numThreads)
+ .name(name() + ".num_insts_per_thread")
+ .desc("Number of instructions committed per thread");
+
+ cpi
+ .name(name() + ".cpi")
+ .desc("Cycles per instruction")
+ .precision(6);
+ cpi = numCycles / numInsts;
+
+ cpiPerThread
+ .name(name() + ".cpi_per_thread")
+ .desc("Cycles per instruction for each thread")
+ .precision(6);
+ cpiPerThread = numCycles / numInstsPerThread;
+
+
+ ipc
+ .name(name() + ".ipc")
+ .desc("Instructions per cycle")
+ .precision(6);
+ ipc = numInsts / numCycles;
+
+ ipcPerThread
+ .name(name() + ".ipc_per_thread")
+ .desc("Instructions per cycle for each thread")
+ .precision(6);
+ ipcPerThread = numInstsPerThread / numCycles;
+
+
int size = threadContexts.size();
if (size > 1) {
for (int i = 0; i < size; ++i) {
diff -r e0c1c6d87649 -r 2cbb826e9ca0 src/cpu/base.hh
--- a/src/cpu/base.hh Sun Aug 23 14:19:14 2009 -0700
+++ b/src/cpu/base.hh Thu Sep 03 11:24:52 2009 -0400
@@ -311,6 +311,24 @@
public:
// Number of CPU cycles simulated
Stats::Scalar numCycles;
+
+ // Number of instructions committed by CPU
+ Stats::Scalar numInsts;
+
+ /** Stat for the number of committed instructions per thread. */
+ Stats::Vector numInstsPerThread;
+
+ /** Stat for the CPI */
+ Stats::Formula cpi;
+
+ /** Stat for the CPI per thread. */
+ Stats::Formula cpiPerThread;
+
+ /** Stat for the IPC */
+ Stats::Formula ipc;
+
+ /** Stat for the IPC per thread */
+ Stats::Formula ipcPerThread;
};
#endif // __CPU_BASE_HH__
diff -r e0c1c6d87649 -r 2cbb826e9ca0 src/cpu/inorder/cpu.cc
--- a/src/cpu/inorder/cpu.cc Sun Aug 23 14:19:14 2009 -0700
+++ b/src/cpu/inorder/cpu.cc Thu Sep 03 11:24:52 2009 -0400
@@ -319,56 +319,6 @@
.name(name() + ".smtCycles")
.desc("Total number of cycles that the CPU was simultaneous
multithreading.(SMT)");
- committedInsts
- .init(numThreads)
- .name(name() + ".committedInsts")
- .desc("Number of Instructions Simulated (Per-Thread)");
-
- smtCommittedInsts
- .init(numThreads)
- .name(name() + ".smtCommittedInsts")
- .desc("Number of SMT Instructions Simulated (Per-Thread)");
-
- totalCommittedInsts
- .name(name() + ".committedInsts_total")
- .desc("Number of Instructions Simulated (Total)");
-
- cpi
- .name(name() + ".cpi")
- .desc("CPI: Cycles Per Instruction (Per-Thread)")
- .precision(6);
- cpi = threadCycles / committedInsts;
-
- smtCpi
- .name(name() + ".smt_cpi")
- .desc("CPI: Total SMT-CPI")
- .precision(6);
- smtCpi = smtCycles / smtCommittedInsts;
-
- totalCpi
- .name(name() + ".cpi_total")
- .desc("CPI: Total CPI of All Threads")
- .precision(6);
- totalCpi = numCycles / totalCommittedInsts;
-
- ipc
- .name(name() + ".ipc")
- .desc("IPC: Instructions Per Cycle (Per-Thread)")
- .precision(6);
- ipc = committedInsts / threadCycles;
-
- smtIpc
- .name(name() + ".smt_ipc")
- .desc("IPC: Total SMT-IPC")
- .precision(6);
- smtIpc = smtCommittedInsts / smtCycles;
-
- totalIpc
- .name(name() + ".ipc_total")
- .desc("IPC: Total IPC of All Threads")
- .precision(6);
- totalIpc = totalCommittedInsts / numCycles;
-
BaseCPU::regStats();
}
@@ -1024,15 +974,10 @@
thread[tid]->numInsts++;
// Count committed insts per thread stats
- committedInsts[tid]++;
+ numInstsPerThread[tid]++;
// Count total insts committed stat
- totalCommittedInsts++;
-
- // Count SMT-committed insts per thread stat
- if (numActiveThreads() > 1) {
- smtCommittedInsts[tid]++;
- }
+ numInsts++;
// Check for instruction-count-based events.
comInstEventQueue[tid]->serviceEvents(thread[tid]->numInst);
diff -r e0c1c6d87649 -r 2cbb826e9ca0 src/cpu/inorder/cpu.hh
--- a/src/cpu/inorder/cpu.hh Sun Aug 23 14:19:14 2009 -0700
+++ b/src/cpu/inorder/cpu.hh Thu Sep 03 11:24:52 2009 -0400
@@ -673,32 +673,6 @@
/** Stat for total number of cycles the CPU spends descheduled. */
Stats::Scalar idleCycles;
- /** Stat for the number of committed instructions per thread. */
- Stats::Vector committedInsts;
-
- /** Stat for the number of committed instructions per thread. */
- Stats::Vector smtCommittedInsts;
-
- /** Stat for the total number of committed instructions. */
- Stats::Scalar totalCommittedInsts;
-
- /** Stat for the CPI per thread. */
- Stats::Formula cpi;
-
- /** Stat for the SMT-CPI per thread. */
- Stats::Formula smtCpi;
-
- /** Stat for the total CPI. */
- Stats::Formula totalCpi;
-
- /** Stat for the IPC per thread. */
- Stats::Formula ipc;
-
- /** Stat for the total IPC. */
- Stats::Formula smtIpc;
-
- /** Stat for the total IPC. */
- Stats::Formula totalIpc;
};
#endif // __CPU_O3_CPU_HH__
diff -r e0c1c6d87649 -r 2cbb826e9ca0 src/cpu/inorder/inorder_cpu_builder.cc
--- a/src/cpu/inorder/inorder_cpu_builder.cc Sun Aug 23 14:19:14 2009 -0700
+++ b/src/cpu/inorder/inorder_cpu_builder.cc Thu Sep 03 11:24:52 2009 -0400
@@ -36,7 +36,7 @@
#include "cpu/static_inst.hh"
#include "cpu/inorder/cpu.hh"
#include "cpu/inorder/inorder_dyn_inst.hh"
-#include "cpu/inorder/pipeline_traits.hh"
+//#include "cpu/inorder/pipeline_traits.hh"
#include "params/InOrderCPU.hh"
InOrderCPU *
@@ -44,7 +44,7 @@
{
ThreadID actual_num_threads =
(numThreads >= workload.size()) ? numThreads : workload.size();
-
+
if (workload.size() == 0) {
fatal("Must specify at least one workload!");
}
diff -r e0c1c6d87649 -r 2cbb826e9ca0 src/cpu/o3/commit.hh
--- a/src/cpu/o3/commit.hh Sun Aug 23 14:19:14 2009 -0700
+++ b/src/cpu/o3/commit.hh Thu Sep 03 11:24:52 2009 -0400
@@ -451,8 +451,6 @@
/** Updates commit stats based on this instruction. */
void updateComInstStats(DynInstPtr &inst);
- /** Stat for the total number of committed instructions. */
- Stats::Scalar commitCommittedInsts;
/** Stat for the total number of squashed instructions discarded by commit.
*/
Stats::Scalar commitSquashedInsts;
@@ -469,8 +467,6 @@
/** Distribution of the number of committed instructions each cycle. */
Stats::Distribution numCommittedDist;
- /** Total number of instructions committed. */
- Stats::Vector statComInst;
/** Total number of software prefetches committed. */
Stats::Vector statComSwp;
/** Stat for the total number of committed memory references. */
diff -r e0c1c6d87649 -r 2cbb826e9ca0 src/cpu/o3/commit_impl.hh
--- a/src/cpu/o3/commit_impl.hh Sun Aug 23 14:19:14 2009 -0700
+++ b/src/cpu/o3/commit_impl.hh Thu Sep 03 11:24:52 2009 -0400
@@ -150,10 +150,7 @@
DefaultCommit<Impl>::regStats()
{
using namespace Stats;
- commitCommittedInsts
- .name(name() + ".commitCommittedInsts")
- .desc("The number of committed instructions")
- .prereq(commitCommittedInsts);
+
commitSquashedInsts
.name(name() + ".commitSquashedInsts")
.desc("The number of squashed insts skipped by commit")
@@ -174,17 +171,10 @@
numCommittedDist
.init(0,commitWidth,1)
.name(name() + ".COM:committed_per_cycle")
- .desc("Number of insts commited each cycle")
+ .desc("Number of insts committed each cycle")
.flags(Stats::pdf)
;
- statComInst
- .init(cpu->numThreads)
- .name(name() + ".COM:count")
- .desc("Number of instructions committed")
- .flags(total)
- ;
-
statComSwp
.init(cpu->numThreads)
.name(name() + ".COM:swp_count")
@@ -902,14 +892,6 @@
// Set the doneSeqNum to the youngest committed instruction.
toIEW->commitInfo[tid].doneSeqNum = head_inst->seqNum;
- ++commitCommittedInsts;
-
- // To match the old model, don't count nops and instruction
- // prefetches towards the total commit count.
- if (!head_inst->isNop() && !head_inst->isInstPrefetch()) {
- cpu->instDone(tid);
- }
-
PC[tid] = nextPC[tid];
nextPC[tid] = nextNPC[tid];
nextNPC[tid] = nextNPC[tid] + sizeof(TheISA::MachInst);
@@ -1242,18 +1224,11 @@
{
ThreadID tid = inst->threadNumber;
- //
- // Pick off the software prefetches
- //
-#ifdef TARGET_ALPHA
- if (inst->isDataPrefetch()) {
- statComSwp[tid]++;
- } else {
- statComInst[tid]++;
- }
-#else
- statComInst[tid]++;
-#endif
+ // To match the old model, don't count nops and instruction
+ // prefetches towards the total commit count.
+ //if (!head_inst->isNop() && !head_inst->isInstPrefetch()) {
+ cpu->instDone(tid);
+ //}
//
// Control Instructions
diff -r e0c1c6d87649 -r 2cbb826e9ca0 src/cpu/o3/cpu.cc
--- a/src/cpu/o3/cpu.cc Sun Aug 23 14:19:14 2009 -0700
+++ b/src/cpu/o3/cpu.cc Thu Sep 03 11:24:52 2009 -0400
@@ -439,43 +439,6 @@
"to idling")
.prereq(idleCycles);
- // Number of Instructions simulated
- // --------------------------------
- // Should probably be in Base CPU but need templated
- // MaxThreads so put in here instead
- committedInsts
- .init(numThreads)
- .name(name() + ".committedInsts")
- .desc("Number of Instructions Simulated");
-
- totalCommittedInsts
- .name(name() + ".committedInsts_total")
- .desc("Number of Instructions Simulated");
-
- cpi
- .name(name() + ".cpi")
- .desc("CPI: Cycles Per Instruction")
- .precision(6);
- cpi = numCycles / committedInsts;
-
- totalCpi
- .name(name() + ".cpi_total")
- .desc("CPI: Total CPI of All Threads")
- .precision(6);
- totalCpi = numCycles / totalCommittedInsts;
-
- ipc
- .name(name() + ".ipc")
- .desc("IPC: Instructions Per Cycle")
- .precision(6);
- ipc = committedInsts / numCycles;
-
- totalIpc
- .name(name() + ".ipc_total")
- .desc("IPC: Total IPC of All Threads")
- .precision(6);
- totalIpc = totalCommittedInsts / numCycles;
-
this->fetch.regStats();
this->decode.regStats();
this->rename.regStats();
@@ -1400,8 +1363,8 @@
// Keep an instruction count.
thread[tid]->numInst++;
thread[tid]->numInsts++;
- committedInsts[tid]++;
- totalCommittedInsts++;
+ numInstsPerThread[tid]++;
+ numInsts++;
// Check for instruction-count-based events.
comInstEventQueue[tid]->serviceEvents(thread[tid]->numInst);
diff -r e0c1c6d87649 -r 2cbb826e9ca0 src/cpu/o3/cpu.hh
--- a/src/cpu/o3/cpu.hh Sun Aug 23 14:19:14 2009 -0700
+++ b/src/cpu/o3/cpu.hh Thu Sep 03 11:24:52 2009 -0400
@@ -726,18 +726,6 @@
Stats::Scalar timesIdled;
/** Stat for total number of cycles the CPU spends descheduled. */
Stats::Scalar idleCycles;
- /** Stat for the number of committed instructions per thread. */
- Stats::Vector committedInsts;
- /** Stat for the total number of committed instructions. */
- Stats::Scalar totalCommittedInsts;
- /** Stat for the CPI per thread. */
- Stats::Formula cpi;
- /** Stat for the total CPI. */
- Stats::Formula totalCpi;
- /** Stat for the IPC per thread. */
- Stats::Formula ipc;
- /** Stat for the total IPC. */
- Stats::Formula totalIpc;
};
#endif // __CPU_O3_CPU_HH__
diff -r e0c1c6d87649 -r 2cbb826e9ca0 src/cpu/simple/base.cc
--- a/src/cpu/simple/base.cc Sun Aug 23 14:19:14 2009 -0700
+++ b/src/cpu/simple/base.cc Thu Sep 03 11:24:52 2009 -0400
@@ -126,11 +126,6 @@
BaseCPU::regStats();
- numInsts
- .name(name() + ".num_insts")
- .desc("Number of instructions executed")
- ;
-
numMemRefs
.name(name() + ".num_refs")
.desc("Number of memory references")
diff -r e0c1c6d87649 -r 2cbb826e9ca0 src/cpu/simple/base.hh
--- a/src/cpu/simple/base.hh Sun Aug 23 14:19:14 2009 -0700
+++ b/src/cpu/simple/base.hh Thu Sep 03 11:24:52 2009 -0400
@@ -177,14 +177,16 @@
// number of simulated instructions
Counter numInst;
Counter startNumInst;
- Stats::Scalar numInsts;
void countInst()
{
+ // Increment counters
numInst++;
+ thread->funcExeInst++;
+
+ // Increment stats
numInsts++;
-
- thread->funcExeInst++;
+ numInstsPerThread[0/*tid*/]++;
}
virtual Counter totalInstructions() const
_______________________________________________
m5-dev mailing list
[email protected]
http://m5sim.org/mailman/listinfo/m5-dev
