Hello sorry I was unresponsive for a while, other non-m5 related activities intruded.
Even though I was idle, our cluster here was not. I ran all of spec2k full reference inputs on m5 for Alpha, x86, and x86_64 and put the preliminary results here: http://www.csl.cornell.edu/~vince/projects/m5 The x86 (32-bit) results are more or less what I've reported on the list earlier. The x86 (64-bit) results with SSE compiled binaries I had high hopes for, but unfortunately there are sitll many issues. Many of the benchmarks complained about unimplemented fp/SSE instructions. Most notably: fwait, fnstcw_Mw, fldcw_Mw, movdqa_Vo_Wo, movdqa_Wo_Vo, movdqu_Vo_Wo, movdqu_Wo_Vo, prefetch_nta The main missing syscalls (besides the ones in my previous patchs) are rt_sigaction and stat. For Alpha of course the outlook is much better (I ran the benchmarks as a baseline). vpr.place and facerec both give wrong results, and there are lots of warnings about non-standard trapping modes not being supported, but in general all the rest of the benchmarks ran completely (and correctly at a first glance). I plan to start addressing some of the system-call problems with small, carefully tested patches. Those patches will supercede the previous ones I posted. Progress might be slow for a while though. I'll also be glad to handle the ioctl changes. I also don't object to the previously posted systemcall patches by other people being merged. I should have checked harder before doing mine, would have saved a lot of duplicated effort. Vince _______________________________________________ m5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/m5-dev
