changeset f0f07a30e805 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=f0f07a30e805
description:
merged with ISA event manager fix
diffstat:
6 files changed, 41 insertions(+), 12 deletions(-)
src/arch/alpha/isa.cc | 4 ++--
src/arch/alpha/isa.hh | 5 +++--
src/arch/arm/isa.hh | 5 +++--
src/arch/mips/isa.hh | 7 +++++--
src/cpu/simple_thread.cc | 10 ++++++++++
src/dev/mc146818.cc | 22 ++++++++++++++++++----
diffs (135 lines):
diff -r a1d8c53d92b8 -r f0f07a30e805 src/arch/alpha/isa.cc
--- a/src/arch/alpha/isa.cc Fri Oct 16 08:15:53 2009 -0700
+++ b/src/arch/alpha/isa.cc Sun Oct 18 11:04:42 2009 -0700
@@ -36,7 +36,7 @@
{
void
-ISA::serialize(std::ostream &os)
+ISA::serialize(EventManager *em, std::ostream &os)
{
SERIALIZE_SCALAR(fpcr);
SERIALIZE_SCALAR(uniq);
@@ -46,7 +46,7 @@
}
void
-ISA::unserialize(Checkpoint *cp, const std::string §ion)
+ISA::unserialize(EventManager *em, Checkpoint *cp, const std::string §ion)
{
UNSERIALIZE_SCALAR(fpcr);
UNSERIALIZE_SCALAR(uniq);
diff -r a1d8c53d92b8 -r f0f07a30e805 src/arch/alpha/isa.hh
--- a/src/arch/alpha/isa.hh Fri Oct 16 08:15:53 2009 -0700
+++ b/src/arch/alpha/isa.hh Sun Oct 18 11:04:42 2009 -0700
@@ -83,8 +83,9 @@
intr_flag = 0;
}
- void serialize(std::ostream &os);
- void unserialize(Checkpoint *cp, const std::string §ion);
+ void serialize(EventManager *em, std::ostream &os);
+ void unserialize(EventManager *em, Checkpoint *cp,
+ const std::string §ion);
void reset(std::string core_name, ThreadID num_threads,
unsigned num_vpes, BaseCPU *_cpu)
diff -r a1d8c53d92b8 -r f0f07a30e805 src/arch/arm/isa.hh
--- a/src/arch/arm/isa.hh Fri Oct 16 08:15:53 2009 -0700
+++ b/src/arch/arm/isa.hh Sun Oct 18 11:04:42 2009 -0700
@@ -95,9 +95,10 @@
return reg;
}
- void serialize(std::ostream &os)
+ void serialize(EventManager *em, std::ostream &os)
{}
- void unserialize(Checkpoint *cp, const std::string §ion)
+ void unserialize(EventManager *em, Checkpoint *cp,
+ const std::string §ion)
{}
ISA()
diff -r a1d8c53d92b8 -r f0f07a30e805 src/arch/mips/isa.hh
--- a/src/arch/mips/isa.hh Fri Oct 16 08:15:53 2009 -0700
+++ b/src/arch/mips/isa.hh Sun Oct 18 11:04:42 2009 -0700
@@ -172,8 +172,11 @@
return reg;
}
- void serialize(std::ostream &os);
- void unserialize(Checkpoint *cp, const std::string §ion);
+ void serialize(EventManager *em, std::ostream &os)
+ {}
+ void unserialize(EventManager *em, Checkpoint *cp,
+ const std::string §ion)
+ {}
};
}
diff -r a1d8c53d92b8 -r f0f07a30e805 src/cpu/simple_thread.cc
--- a/src/cpu/simple_thread.cc Fri Oct 16 08:15:53 2009 -0700
+++ b/src/cpu/simple_thread.cc Sun Oct 18 11:04:42 2009 -0700
@@ -199,6 +199,11 @@
SERIALIZE_SCALAR(nextPC);
SERIALIZE_SCALAR(nextNPC);
// thread_num and cpu_id are deterministic from the config
+
+ //
+ // Now must serialize all the ISA dependent state
+ //
+ isa.serialize(cpu, os);
}
@@ -214,6 +219,11 @@
UNSERIALIZE_SCALAR(nextPC);
UNSERIALIZE_SCALAR(nextNPC);
// thread_num and cpu_id are deterministic from the config
+
+ //
+ // Now must unserialize all the ISA dependent state
+ //
+ isa.unserialize(cpu, cp, section);
}
#if FULL_SYSTEM
diff -r a1d8c53d92b8 -r f0f07a30e805 src/dev/mc146818.cc
--- a/src/dev/mc146818.cc Fri Oct 16 08:15:53 2009 -0700
+++ b/src/dev/mc146818.cc Sun Oct 18 11:04:42 2009 -0700
@@ -207,6 +207,15 @@
arrayParamOut(os, base + ".clock_data", clock_data, sizeof(clock_data));
paramOut(os, base + ".stat_regA", stat_regA);
paramOut(os, base + ".stat_regB", stat_regB);
+
+ //
+ // save the timer tick and rtc clock tick values to correctly reschedule
+ // them during unserialize
+ //
+ Tick rtcTimerInterruptTickOffset = event.when() - curTick;
+ SERIALIZE_SCALAR(rtcTimerInterruptTickOffset);
+ Tick rtcClockTickOffset = event.when() - curTick;
+ SERIALIZE_SCALAR(rtcClockTickOffset);
}
void
@@ -218,10 +227,15 @@
paramIn(cp, section, base + ".stat_regA", stat_regA);
paramIn(cp, section, base + ".stat_regB", stat_regB);
- // We're not unserializing the event here, but we need to
- // rescehedule the event since curTick was moved forward by the
- // checkpoint
- reschedule(event, curTick + event.interval);
+ //
+ // properly schedule the timer and rtc clock events
+ //
+ Tick rtcTimerInterruptTickOffset;
+ UNSERIALIZE_SCALAR(rtcTimerInterruptTickOffset);
+ reschedule(event, curTick + rtcTimerInterruptTickOffset);
+ Tick rtcClockTickOffset;
+ UNSERIALIZE_SCALAR(rtcClockTickOffset);
+ reschedule(tickEvent, curTick + rtcClockTickOffset);
}
MC146818::RTCEvent::RTCEvent(MC146818 * _parent, Tick i)
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