changeset cd68b6ecd68d in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=cd68b6ecd68d
description:
POWER: Add support for the Power ISA
This adds support for the 32-bit, big endian Power ISA. This supports
both
integer and floating point instructions based on the Power ISA Book I
v2.06.
diffstat:
63 files changed, 7465 insertions(+), 2 deletions(-)
build_opts/POWER_SE | 3
src/arch/isa_parser.py | 10
src/arch/power/PowerTLB.py | 37 +
src/arch/power/SConscript | 61 +++
src/arch/power/SConsopts | 33 +
src/arch/power/faults.hh | 87 ++++
src/arch/power/insts/branch.cc | 169 ++++++++
src/arch/power/insts/branch.hh | 241 ++++++++++++
src/arch/power/insts/condition.cc | 59 ++
src/arch/power/insts/condition.hh | 86 ++++
src/arch/power/insts/floating.cc | 60 +++
src/arch/power/insts/floating.hh | 153 +++++++
src/arch/power/insts/integer.cc | 170 ++++++++
src/arch/power/insts/integer.hh | 176 ++++++++
src/arch/power/insts/mem.cc | 74 +++
src/arch/power/insts/mem.hh | 91 ++++
src/arch/power/insts/misc.cc | 60 +++
src/arch/power/insts/misc.hh | 57 ++
src/arch/power/insts/static_inst.cc | 62 +++
src/arch/power/insts/static_inst.hh | 70 +++
src/arch/power/isa.hh | 115 +++++
src/arch/power/isa/bitfields.isa | 84 ++++
src/arch/power/isa/decoder.isa | 593 ++++++++++++++++++++++++++++++
src/arch/power/isa/formats/basic.isa | 103 +++++
src/arch/power/isa/formats/branch.isa | 222 +++++++++++
src/arch/power/isa/formats/condition.isa | 47 ++
src/arch/power/isa/formats/formats.isa | 60 +++
src/arch/power/isa/formats/fp.isa | 132 ++++++
src/arch/power/isa/formats/integer.isa | 369 ++++++++++++++++++
src/arch/power/isa/formats/mem.isa | 351 +++++++++++++++++
src/arch/power/isa/formats/misc.isa | 61 +++
src/arch/power/isa/formats/unimp.isa | 146 +++++++
src/arch/power/isa/formats/unknown.isa | 87 ++++
src/arch/power/isa/formats/util.isa | 174 ++++++++
src/arch/power/isa/includes.isa | 92 ++++
src/arch/power/isa/main.isa | 57 ++
src/arch/power/isa/operands.isa | 81 ++++
src/arch/power/isa_traits.hh | 75 +++
src/arch/power/linux/linux.cc | 79 +++
src/arch/power/linux/linux.hh | 148 +++++++
src/arch/power/linux/process.cc | 455 +++++++++++++++++++++++
src/arch/power/linux/process.hh | 58 ++
src/arch/power/locked_mem.hh | 64 +++
src/arch/power/microcode_rom.hh | 45 ++
src/arch/power/miscregs.hh | 95 ++++
src/arch/power/mmaped_ipr.hh | 66 +++
src/arch/power/pagetable.cc | 82 ++++
src/arch/power/pagetable.hh | 158 +++++++
src/arch/power/predecoder.hh | 121 ++++++
src/arch/power/process.cc | 288 ++++++++++++++
src/arch/power/process.hh | 59 ++
src/arch/power/registers.hh | 105 +++++
src/arch/power/remote_gdb.hh | 84 ++++
src/arch/power/stacktrace.hh | 148 +++++++
src/arch/power/tlb.cc | 322 ++++++++++++++++
src/arch/power/tlb.hh | 171 ++++++++
src/arch/power/types.hh | 91 ++++
src/arch/power/utility.hh | 118 +++++
src/arch/power/vtophys.hh | 57 ++
src/base/loader/elf_object.cc | 13
src/base/loader/object_file.hh | 3
src/cpu/BaseCPU.py | 11
src/sim/process.cc | 18
diffs (truncated from 7770 to 300 lines):
diff -r 4dc4e494e4d8 -r cd68b6ecd68d build_opts/POWER_SE
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/build_opts/POWER_SE Tue Oct 27 09:24:39 2009 -0700
@@ -0,0 +1,3 @@
+TARGET_ISA = 'power'
+FULL_SYSTEM = 0
+CPU_MODELS = 'AtomicSimpleCPU,TimingSimpleCPU,O3CPU'
diff -r 4dc4e494e4d8 -r cd68b6ecd68d src/arch/isa_parser.py
--- a/src/arch/isa_parser.py Mon Oct 26 17:06:32 2009 -0700
+++ b/src/arch/isa_parser.py Tue Oct 27 09:24:39 2009 -0700
@@ -1465,6 +1465,16 @@
def makeAccSize(self):
return self.size
+class PCOperand(Operand):
+ def makeConstructor(self):
+ return ''
+
+ def makeRead(self):
+ return '%s = xc->readPC();\n' % self.base_name
+
+ def makeWrite(self):
+ return 'xc->setPC(%s);\n' % self.base_name
+
class UPCOperand(Operand):
def makeConstructor(self):
return ''
diff -r 4dc4e494e4d8 -r cd68b6ecd68d src/arch/power/PowerTLB.py
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/src/arch/power/PowerTLB.py Tue Oct 27 09:24:39 2009 -0700
@@ -0,0 +1,37 @@
+# -*- mode:python -*-
+
+# Copyright (c) 2009 The University of Edinburgh
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Timothy M. Jones
+
+from m5.SimObject import SimObject
+from m5.params import *
+
+class PowerTLB(SimObject):
+ type = 'PowerTLB'
+ cxx_class = 'PowerISA::TLB'
+ size = Param.Int(64, "TLB size")
diff -r 4dc4e494e4d8 -r cd68b6ecd68d src/arch/power/SConscript
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/src/arch/power/SConscript Tue Oct 27 09:24:39 2009 -0700
@@ -0,0 +1,61 @@
+# -*- mode:python -*-
+
+# Copyright (c) 2009 The University of Edinburgh
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Timothy M. Jones
+
+Import('*')
+
+if env['TARGET_ISA'] == 'power':
+# Workaround for bug in SCons version > 0.97d20071212
+# Scons bug id: 2006 M5 Bug id: 308
+ Dir('isa/formats')
+ Source('insts/branch.cc')
+ Source('insts/mem.cc')
+ Source('insts/integer.cc')
+ Source('insts/floating.cc')
+ Source('insts/condition.cc')
+ Source('insts/static_inst.cc')
+ Source('pagetable.cc')
+ Source('tlb.cc')
+
+ SimObject('PowerTLB.py')
+ TraceFlag('Power')
+
+ if not env['FULL_SYSTEM']:
+ Source('process.cc')
+ Source('linux/linux.cc')
+ Source('linux/process.cc')
+
+ # Add in files generated by the ISA description.
+ isa_desc_files = env.ISADesc('isa/main.isa')
+
+ # Only non-header files need to be compiled.
+ for f in isa_desc_files:
+ if not f.path.endswith('.hh'):
+ Source(f)
+
diff -r 4dc4e494e4d8 -r cd68b6ecd68d src/arch/power/SConsopts
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/src/arch/power/SConsopts Tue Oct 27 09:24:39 2009 -0700
@@ -0,0 +1,33 @@
+# -*- mode:python -*-
+
+# Copyright (c) 2009 The University of Edinburgh
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Timothy M. Jones
+
+Import('*')
+
+all_isa_list.append('power')
diff -r 4dc4e494e4d8 -r cd68b6ecd68d src/arch/power/faults.hh
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/src/arch/power/faults.hh Tue Oct 27 09:24:39 2009 -0700
@@ -0,0 +1,87 @@
+/*
+ * Copyright (c) 2003-2005 The Regents of The University of Michigan
+ * Copyright (c) 2009 The University of Edinburgh
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Gabe Black
+ * Timothy M. Jones
+ */
+
+#ifndef __ARCH_POWER_FAULTS_HH__
+#define __ARCH_POWER_FAULTS_HH__
+
+#include "sim/faults.hh"
+
+namespace PowerISA
+{
+
+class PowerFault : public FaultBase
+{
+ protected:
+ FaultName _name;
+
+ PowerFault(FaultName name)
+ : _name(name)
+ {
+ }
+
+ FaultName
+ name() const
+ {
+ return _name;
+ }
+};
+
+
+class UnimplementedOpcodeFault : public PowerFault
+{
+ public:
+ UnimplementedOpcodeFault()
+ : PowerFault("Unimplemented Opcode")
+ {
+ }
+};
+
+
+class MachineCheckFault : public PowerFault
+{
+ public:
+ MachineCheckFault()
+ : PowerFault("Machine Check")
+ {
+ }
+};
+
+
+static inline Fault
+genMachineCheckFault()
+{
+ return new MachineCheckFault();
+}
+
+} // PowerISA namespace
+
+#endif // __ARCH_POWER_FAULTS_HH__
diff -r 4dc4e494e4d8 -r cd68b6ecd68d src/arch/power/insts/branch.cc
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/src/arch/power/insts/branch.cc Tue Oct 27 09:24:39 2009 -0700
@@ -0,0 +1,169 @@
+/*
+ * Copyright (c) 2009 The University of Edinburgh
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Timothy M. Jones
+ */
+
+#include "arch/power/insts/branch.hh"
+#include "base/loader/symtab.hh"
+
+using namespace PowerISA;
+
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