This instruction actually goes in
arch/x86/isa/insts/general_purpose/data_transfer/move.py. It's ambiguous
(and somewhat arbitrary) since it fits in both categories, but that's
where I have a comment for it. Would you mind moving it?
Also, I think the GPR size should be 32 bits unless an REX prefix is
present in which case it should be 64. To get that, the ldfps and stfps
should use dataSize=dsz, or leave it out since that's the default. Then
the Ed argument type specifiers should be changed to Edp. The d suffix
describes how dataSize is set for that instruction which is always 4
bytes. If it's set inconsistently between arguments that's normally an
error since it's not clear the ISA parser should try to be smart enough
to sort that out, but since XMM register sizes are handled differently,
the suffix for those is ignored. Anyway, dp means exactly what you want,
4 bytes normally, and 8 bytes if REX.W is set. You can find the suffixes
in action in arch/x86/isa/macroop.isa in the getAllocator function of
the EmulEnv class. Unfortunately I don't think they're documented
anywhere else at the moment.
Gabe
Vince Weaver wrote:
> The patch below implements movd_Vo_Ed on x86.
>
> Attached is a small sample program that tests the instruction.
>
> I'm not sure if I put this instruction in the right file.
>
> The patch depends on some of my earlier sse patches to apply cleanly.
>
> Vince
>
>
> diff -r a3c85a29b838 src/arch/x86/isa/decoder/two_byte_opcodes.isa
> --- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa Tue Oct 27 09:24:40
> 2009 -0700
> +++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa Tue Oct 27 23:47:49
> 2009 -0400
> @@ -615,8 +615,8 @@
> 0x3: PACKSSDW(Vo,Wo);
> 0x4: PUNPCKLQDQ(Vo,Wq);
> 0x5: PUNPCKHQDQ(Vo,Wq);
> - 0x6: WarnUnimpl::movd_Vo_Ed();
> + 0x6: MOVD(Vo,Ed);
> 0x7: MOVDQA(Vo,Wo);
> }
> default: UD2();
> }
> @@ -705,9 +707,9 @@
> }
> // operand size (0x66)
> 0x1: decode OPCODE_OP_BOTTOM3 {
> 0x4: HADDPD(Vo,Wo);
> 0x5: WarnUnimpl::hsubpd_Vo_Wo();
> - 0x6: WarnUnimpl::movd_Ed_Vd();
> + 0x6: MOVD(Ed,Vd);
> 0x7: MOVDQA(Wo,Vo);
> default: UD2();
> }
> // repne (0xF2)
> diff -r a3c85a29b838
> src/arch/x86/isa/insts/simd128/integer/data_transfer/move.py
> --- a/src/arch/x86/isa/insts/simd128/integer/data_transfer/move.py Tue Oct
> 27 09:24:40 2009 -0700
> +++ b/src/arch/x86/isa/insts/simd128/integer/data_transfer/move.py Tue Oct
> 27 23:47:49 2009 -0400
> @@ -54,6 +54,35 @@
> # Authors: Gabe Black
>
> microcode = '''
> +def macroop MOVD_XMM_R {
> + mov2fp xmml, regm, srcSize=dsz, destSize=8
> + lfpimm xmmh, 0
> +};
> +
> +def macroop MOVD_XMM_M {
> + ldfp xmml, seg, sib, disp, dataSize=4
> + lfpimm xmmh, 0
> +};
> +
> +def macroop MOVD_XMM_P {
> + rdip t7
> + ldfp xmml, seg, riprel, disp, dataSize=4
> + lfpimm xmmh, 0
> +};
> +
> +def macroop MOVD_R_XMM {
> + mov2int reg, xmml, size=dsz
> +};
> +
> +def macroop MOVD_M_XMM {
> + stfp xmml, seg, sib, disp, dataSize=4
> +};
> +
> +def macroop MOVD_P_XMM {
> + rdip t7
> + stfp xmml, seg, riprel, disp, dataSize=4
> +};
> +
> def macroop MOVQ_XMM_XMM {
> movfp xmml, xmmlm
> lfpimm xmmh, 0
> ------------------------------------------------------------------------
>
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