changeset 0ad05775b549 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=0ad05775b549
description:
ARM: Get rid of some unneeded register indexes.
diffstat:
1 file changed, 30 deletions(-)
src/arch/arm/registers.hh | 30 ------------------------------
diffs (47 lines):
diff -r fb4a3a61bc74 -r 0ad05775b549 src/arch/arm/registers.hh
--- a/src/arch/arm/registers.hh Wed Nov 04 13:22:15 2009 -0500
+++ b/src/arch/arm/registers.hh Sat Nov 07 22:34:33 2009 -0800
@@ -77,7 +77,6 @@
const int PCReg = 15;
const int ZeroReg = NumIntArchRegs;
-const int AddrReg = ZeroReg + 1; // Used to generate address for uops
const int SyscallNumReg = ReturnValueReg;
const int SyscallPseudoReturnReg = ReturnValueReg;
@@ -116,35 +115,6 @@
Cause_Field = 11
};
-enum MiscIntRegNums {
- zero_reg = NumIntArchRegs,
- addr_reg,
-
- rhi,
- rlo,
-
- r8_fiq, /* FIQ mode register bank */
- r9_fiq,
- r10_fiq,
- r11_fiq,
- r12_fiq,
-
- r13_fiq, /* FIQ mode SP and LR */
- r14_fiq,
-
- r13_irq, /* IRQ mode SP and LR */
- r14_irq,
-
- r13_svc, /* SVC mode SP and LR */
- r14_svc,
-
- r13_undef, /* UNDEF mode SP and LR */
- r14_undef,
-
- r13_abt, /* ABT mode SP and LR */
- r14_abt
-};
-
} // namespace ArmISA
#endif
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