changeset 5037062422c8 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=5037062422c8
description:
        compile: wrap 64bit numbers with ULL() so 32bit compiles work
        In the isa_parser, we need to check case statements.

diffstat:

2 files changed, 7 insertions(+), 2 deletions(-)
src/arch/isa_parser.py  |    7 ++++++-
src/arch/x86/process.cc |    2 +-

diffs (29 lines):

diff -r 70129fdded75 -r 5037062422c8 src/arch/isa_parser.py
--- a/src/arch/isa_parser.py    Sun Nov 08 02:08:40 2009 -0800
+++ b/src/arch/isa_parser.py    Sun Nov 08 13:31:59 2009 -0800
@@ -585,7 +585,12 @@
     # 'default'
     def p_case_label_0(self, t):
         'case_label : intlit_list'
-        t[0] = ': '.join(map(lambda a: 'case %#x' % a, t[1]))
+        def make_case(intlit):
+            if intlit >= 2**32:
+                return 'case ULL(%#x)' % intlit
+            else:
+                return 'case %#x' % intlit
+        t[0] = ': '.join(map(make_case, t[1]))
 
     def p_case_label_1(self, t):
         'case_label : DEFAULT'
diff -r 70129fdded75 -r 5037062422c8 src/arch/x86/process.cc
--- a/src/arch/x86/process.cc   Sun Nov 08 02:08:40 2009 -0800
+++ b/src/arch/x86/process.cc   Sun Nov 08 13:31:59 2009 -0800
@@ -175,7 +175,7 @@
         int _numSyscallDescs) :
     X86LiveProcess(params, objFile, _syscallDescs, _numSyscallDescs)
 {
-    _gdtStart = 0x100000000;
+    _gdtStart = ULL(0x100000000);
     _gdtSize = VMPageSize;
 
     vsyscallPage.base = 0xffffe000ULL;
_______________________________________________
m5-dev mailing list
[email protected]
http://m5sim.org/mailman/listinfo/m5-dev

Reply via email to