It looks like there are some extra spaces before the ULLs. Gabe
Quoting nathan binkert <[email protected]>: > Looks good to me. > > Nate > > On Tue, Nov 10, 2009 at 9:21 AM, Vince Weaver <[email protected]> wrote: >> On Mon, 9 Nov 2009, nathan binkert wrote: >> >>> Can you swap your ULL at the end with the ULL macro? We use that >>> everywhere right now. it's in src/base/types.hh >>> >>> Though, I do wonder if it still necessary. >> >> well, I don't know if it's necessary or not. But I've updated the patch >> like below. Does this look good? I also caught 2 cases in the >> src/arch/x86/isa/microops/regop.isa file. I've tested it with >> perlbmk.makerand which gives wrong results without the patch. >> >> >> diff -r 16817406af29 src/arch/x86/isa/microops/mediaop.isa >> --- a/src/arch/x86/isa/microops/mediaop.isa Tue Nov 10 11:29:30 >> 2009 -0500 >> +++ b/src/arch/x86/isa/microops/mediaop.isa Tue Nov 10 11:38:49 >> 2009 -0500 >> @@ -452,7 +452,7 @@ >> if (signBit) { >> if (overflow != mask(destBits - srcBits + 1)) { >> if (ext & 0x1) >> - picked = (1 << (destBits - 1)); >> + picked = ( ULL(1) << (destBits - 1)); >> else >> picked = 0; >> } >> @@ -480,7 +480,7 @@ >> if (signBit) { >> if (overflow != mask(destBits - srcBits + 1)) { >> if (ext & 0x1) >> - picked = (1 << (destBits - 1)); >> + picked = ( ULL(1) << (destBits - 1)); >> else >> picked = 0; >> } >> @@ -642,10 +642,10 @@ >> int loIndex = (i + 0) * sizeBits; >> uint64_t arg1Bits = bits(FpSrcReg1.uqw, hiIndex, loIndex); >> int64_t arg1 = arg1Bits | >> - (0 - (arg1Bits & (1 << (sizeBits - 1)))); >> + (0 - (arg1Bits & ( ULL(1) << (sizeBits - 1)))); >> uint64_t arg2Bits = bits(FpSrcReg2.uqw, hiIndex, loIndex); >> int64_t arg2 = arg2Bits | >> - (0 - (arg2Bits & (1 << (sizeBits - 1)))); >> + (0 - (arg2Bits & ( ULL(1) << (sizeBits - 1)))); >> uint64_t resBits; >> >> if (ext & 0x2) { >> @@ -680,10 +680,10 @@ >> int loIndex = (i + 0) * sizeBits; >> uint64_t arg1Bits = bits(FpSrcReg1.uqw, hiIndex, loIndex); >> int64_t arg1 = arg1Bits | >> - (0 - (arg1Bits & (1 << (sizeBits - 1)))); >> + (0 - (arg1Bits & ( ULL(1) << (sizeBits - 1)))); >> uint64_t arg2Bits = bits(FpSrcReg2.uqw, hiIndex, loIndex); >> int64_t arg2 = arg2Bits | >> - (0 - (arg2Bits & (1 << (sizeBits - 1)))); >> + (0 - (arg2Bits & ( ULL(1) << (sizeBits - 1)))); >> uint64_t resBits; >> >> if (ext & 0x2) { >> @@ -957,7 +957,7 @@ >> int resSign = bits(resBits, sizeBits - 1); >> if ((arg1Sign == arg2Sign) && (arg1Sign != resSign)) { >> if (resSign == 0) >> - resBits = (1 << (sizeBits - 1)); >> + resBits = ( ULL(1) << (sizeBits - 1)); >> else >> resBits = mask(sizeBits - 1); >> } >> @@ -996,7 +996,7 @@ >> int resSign = bits(resBits, sizeBits - 1); >> if ((arg1Sign == arg2Sign) && (arg1Sign != resSign)) { >> if (resSign == 0) >> - resBits = (1 << (sizeBits - 1)); >> + resBits = ( ULL(1) << (sizeBits - 1)); >> else >> resBits = mask(sizeBits - 1); >> } >> @@ -1032,16 +1032,16 @@ >> >> if (ext & 0x2) { >> int64_t arg1 = arg1Bits | >> - (0 - (arg1Bits & (1 << (srcBits - 1)))); >> + (0 - (arg1Bits & ( ULL(1) << (srcBits - 1)))); >> int64_t arg2 = arg2Bits | >> - (0 - (arg2Bits & (1 << (srcBits - 1)))); >> + (0 - (arg2Bits & ( ULL(1) << (srcBits - 1)))); >> resBits = (uint64_t)(arg1 * arg2); >> } else { >> resBits = arg1Bits * arg2Bits; >> } >> >> if (ext & 0x4) >> - resBits += (1 << (destBits - 1)); >> + resBits += ( ULL(1) << (destBits - 1)); >> >> if (ext & 0x8) >> resBits >>= destBits; >> @@ -1142,7 +1142,7 @@ >> } else { >> resBits = (arg1Bits >> shiftAmt); >> resBits = resBits | >> - (0 - (resBits & (1 << (sizeBits - 1 - shiftAmt)))); >> + (0 - (resBits & ( ULL(1) << (sizeBits - 1 >> - shiftAmt)))); >> } >> >> result = insertBits(result, hiIndex, loIndex, resBits); >> @@ -1289,7 +1289,8 @@ >> int srcHiIndex = srcStart + (i + 1) * srcSizeBits - 1; >> int srcLoIndex = srcStart + (i + 0) * srcSizeBits; >> uint64_t argBits = bits(FpSrcReg1.uqw, srcHiIndex, >> srcLoIndex); >> - int64_t sArg = argBits | (0 - (argBits & (1 << >> srcHiIndex))); >> + >> + int64_t sArg = argBits | (0 - (argBits & ( ULL(1) >> << srcHiIndex))); >> double arg = sArg; >> >> if (destSize == 4) { >> @@ -1400,10 +1401,10 @@ >> int loIndex = (i + 0) * sizeBits; >> uint64_t arg1Bits = bits(FpSrcReg1.uqw, hiIndex, loIndex); >> int64_t arg1 = arg1Bits | >> - (0 - (arg1Bits & (1 << (sizeBits - 1)))); >> + (0 - (arg1Bits & ( ULL(1) << (sizeBits - 1)))); >> uint64_t arg2Bits = bits(FpSrcReg2.uqw, hiIndex, loIndex); >> int64_t arg2 = arg2Bits | >> - (0 - (arg2Bits & (1 << (sizeBits - 1)))); >> + (0 - (arg2Bits & ( ULL(1) << (sizeBits - 1)))); >> >> uint64_t resBits = 0; >> if (((ext & 0x2) == 0 && arg1 == arg2) || >> diff -r 16817406af29 src/arch/x86/isa/microops/regop.isa >> --- a/src/arch/x86/isa/microops/regop.isa Tue Nov 10 11:29:30 >> 2009 -0500 >> +++ b/src/arch/x86/isa/microops/regop.isa Tue Nov 10 11:38:49 >> 2009 -0500 >> @@ -525,7 +525,7 @@ >> code = ''' >> ProdLow = psrc1 * op2; >> int halfSize = (dataSize * 8) / 2; >> - uint64_t shifter = (1ULL << halfSize); >> + uint64_t shifter = ( ULL(1) << halfSize); >> uint64_t hiResult; >> uint64_t psrc1_h = psrc1 / shifter; >> uint64_t psrc1_l = psrc1 & mask(halfSize); >> @@ -553,7 +553,7 @@ >> code = ''' >> ProdLow = psrc1 * op2; >> int halfSize = (dataSize * 8) / 2; >> - uint64_t shifter = (1ULL << halfSize); >> + uint64_t shifter = ( ULL(1) << halfSize); >> uint64_t psrc1_h = psrc1 / shifter; >> uint64_t psrc1_l = psrc1 & mask(halfSize); >> uint64_t psrc2_h = (op2 / shifter) & mask(halfSize); >> _______________________________________________ >> m5-dev mailing list >> [email protected] >> http://m5sim.org/mailman/listinfo/m5-dev >> >> > _______________________________________________ > m5-dev mailing list > [email protected] > http://m5sim.org/mailman/listinfo/m5-dev > _______________________________________________ m5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/m5-dev
