Hello, I am trying to use M5-dev (latest) in SE mode with multiple cpu's (n=4) switching from atomic->timing->detailed. However, the assertion in src/cpu/o3/thread_context_impl.hh takeOverFrom() fails.
getSystemPtr() == old_context->getSystemPtr() This takeOverFrom() is called from src/cpu/o3.cpu.cc BaseCPU::takeOverFrom(oldCPU, ...) which is called from src/python.m5.simulate.py new_cpu.takeOverFrom(old_cpu) The problem occurs during the 2nd part of the standard switch (using Simulation.py) going from timing to detailed. I print out the switch_cpu_list1 which is in the tuple format (old_cpu, new_cpu) where old_cpu is timing and new_cpu is detailed. I have been trying to solve this problem but am getting nowhere. The old_context->getSystemPtr() is returning 0 which is why the assertion is failing. But I am not able to figure out where this happens. Could someone throw some light on this? Thanks, Sujay
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