These changes to the media uops work towards cleaning up ext but don't
cover everything yet. This was to prevent what I had working from going
stale again.

Gabe

Gabe Black wrote:
> changeset 335f8b406bb9 in /z/repo/m5
> details: http://repo.m5sim.org/m5?cmd=changeset;node=335f8b406bb9
> description:
>       X86: Create a common flag with a name to indicate high multiplies.
>
> diffstat:
>
> 5 files changed, 30 insertions(+), 23 deletions(-)
> src/arch/x86/insts/micromediaop.hh                                  |    7 ++
> src/arch/x86/isa/insts/simd128/integer/arithmetic/multiplication.py |   24 
> +++++-----
> src/arch/x86/isa/insts/simd64/integer/arithmetic/multiplication.py  |   18 
> +++----
> src/arch/x86/isa/microasm.isa                                       |    2 
> src/arch/x86/isa/microops/mediaop.isa                               |    2 
>
> diffs (176 lines):
>
> diff -r 36131e4dfb6e -r 335f8b406bb9 src/arch/x86/insts/micromediaop.hh
> --- a/src/arch/x86/insts/micromediaop.hh      Sat Dec 19 01:47:30 2009 -0800
> +++ b/src/arch/x86/insts/micromediaop.hh      Sat Dec 19 01:48:07 2009 -0800
> @@ -36,6 +36,7 @@
>  namespace X86ISA
>  {
>      enum MediaFlag {
> +        MediaMultHiOp = 1,
>          MediaScalarOp = 128
>      };
>  
> @@ -75,6 +76,12 @@
>          {
>              return scalarOp() ? 1 : (sizeof(FloatRegBits) / size);
>          }
> +
> +        bool
> +        multHi() const
> +        {
> +            return ext & MediaMultHiOp;
> +        }
>      };
>  
>      class MediaOpReg : public MediaOpBase
> diff -r 36131e4dfb6e -r 335f8b406bb9 
> src/arch/x86/isa/insts/simd128/integer/arithmetic/multiplication.py
> --- a/src/arch/x86/isa/insts/simd128/integer/arithmetic/multiplication.py     
> Sat Dec 19 01:47:30 2009 -0800
> +++ b/src/arch/x86/isa/insts/simd128/integer/arithmetic/multiplication.py     
> Sat Dec 19 01:48:07 2009 -0800
> @@ -55,23 +55,23 @@
>  
>  microcode = '''
>  def macroop PMULHW_XMM_XMM {
> -    mmuli xmml, xmml, xmmlm, size=2, ext=(0x2 | 0x8)
> -    mmuli xmmh, xmmh, xmmhm, size=2, ext=(0x2 | 0x8)
> +    mmuli xmml, xmml, xmmlm, size=2, ext = "0x2 |" + MultHi
> +    mmuli xmmh, xmmh, xmmhm, size=2, ext = "0x2 |" + MultHi
>  };
>  
>  def macroop PMULHW_XMM_M {
>      ldfp ufp1, seg, sib, "DISPLACEMENT", dataSize=8
>      ldfp ufp2, seg, sib, "DISPLACEMENT + 8", dataSize=8
> -    mmuli xmml, xmml, ufp1, size=2, ext=(0x2 | 0x8)
> -    mmuli xmmh, xmmh, ufp2, size=2, ext=(0x2 | 0x8)
> +    mmuli xmml, xmml, ufp1, size=2, ext = "0x2 |" + MultHi
> +    mmuli xmmh, xmmh, ufp2, size=2, ext = "0x2 |" + MultHi
>  };
>  
>  def macroop PMULHW_XMM_P {
>      rdip t7
>      ldfp ufp1, seg, riprel, "DISPLACEMENT", dataSize=8
>      ldfp ufp2, seg, riprel, "DISPLACEMENT + 8", dataSize=8
> -    mmuli xmml, xmml, ufp1, size=2, ext=(0x2 | 0x8)
> -    mmuli xmmh, xmmh, ufp2, size=2, ext=(0x2 | 0x8)
> +    mmuli xmml, xmml, ufp1, size=2, ext = "0x2 |" + MultHi
> +    mmuli xmmh, xmmh, ufp2, size=2, ext = "0x2 |" + MultHi
>  };
>  
>  def macroop PMULLW_XMM_XMM {
> @@ -95,23 +95,23 @@
>  };
>  
>  def macroop PMULHUW_XMM_XMM {
> -    mmuli xmml, xmml, xmmlm, size=2, ext=8
> -    mmuli xmmh, xmmh, xmmhm, size=2, ext=8
> +    mmuli xmml, xmml, xmmlm, size=2, ext = MultHi
> +    mmuli xmmh, xmmh, xmmhm, size=2, ext = MultHi
>  };
>  
>  def macroop PMULHUW_XMM_M {
>      ldfp ufp1, seg, sib, "DISPLACEMENT", dataSize=8
>      ldfp ufp2, seg, sib, "DISPLACEMENT + 8", dataSize=8
> -    mmuli xmml, xmml, ufp1, size=2, ext=8
> -    mmuli xmmh, xmmh, ufp2, size=2, ext=8
> +    mmuli xmml, xmml, ufp1, size=2, ext = MultHi
> +    mmuli xmmh, xmmh, ufp2, size=2, ext = MultHi
>  };
>  
>  def macroop PMULHUW_XMM_P {
>      rdip t7
>      ldfp ufp1, seg, riprel, "DISPLACEMENT", dataSize=8
>      ldfp ufp2, seg, riprel, "DISPLACEMENT + 8", dataSize=8
> -    mmuli xmml, xmml, ufp1, size=2, ext=8
> -    mmuli xmmh, xmmh, ufp2, size=2, ext=8
> +    mmuli xmml, xmml, ufp1, size=2, ext = MultHi
> +    mmuli xmmh, xmmh, ufp2, size=2, ext = MultHi
>  };
>  
>  def macroop PMULUDQ_XMM_XMM {
> diff -r 36131e4dfb6e -r 335f8b406bb9 
> src/arch/x86/isa/insts/simd64/integer/arithmetic/multiplication.py
> --- a/src/arch/x86/isa/insts/simd64/integer/arithmetic/multiplication.py      
> Sat Dec 19 01:47:30 2009 -0800
> +++ b/src/arch/x86/isa/insts/simd64/integer/arithmetic/multiplication.py      
> Sat Dec 19 01:48:07 2009 -0800
> @@ -55,18 +55,18 @@
>  
>  microcode = '''
>  def macroop PMULHW_MMX_MMX {
> -    mmuli mmx, mmx, mmxm, size=2, ext=(0x2 | 0x8)
> +    mmuli mmx, mmx, mmxm, size=2, ext = "0x2 |" + MultHi
>  };
>  
>  def macroop PMULHW_MMX_M {
>      ldfp ufp1, seg, sib, disp, dataSize=8
> -    mmuli mmx, mmx, ufp1, size=2, ext=(0x2 | 0x8)
> +    mmuli mmx, mmx, ufp1, size=2, ext = "0x2 |" + MultHi
>  };
>  
>  def macroop PMULHW_MMX_P {
>      rdip t7
>      ldfp ufp1, seg, riprel, disp, dataSize=8
> -    mmuli mmx, mmx, ufp1, size=2, ext=(0x2 | 0x8)
> +    mmuli mmx, mmx, ufp1, size=2, ext = "0x2 |" + MultHi
>  };
>  
>  def macroop PMULLW_MMX_MMX {
> @@ -85,33 +85,33 @@
>  };
>  
>  def macroop PMULHRW_MMX_MMX {
> -    mmuli mmx, mmx, mmxm, size=2, ext=(0x2 | 0x4 | 0x8)
> +    mmuli mmx, mmx, mmxm, size=2, ext = "0x2 | 0x4 |" + MultHi
>  };
>  
>  def macroop PMULHRW_MMX_M {
>      ldfp ufp1, seg, sib, disp, dataSize=8
> -    mmuli mmx, mmx, ufp1, size=2, ext=(0x2 | 0x4 | 0x8)
> +    mmuli mmx, mmx, ufp1, size=2, ext = "0x2 | 0x4 |" + MultHi
>  };
>  
>  def macroop PMULHRW_MMX_P {
>      rdip t7
>      ldfp ufp1, seg, riprel, disp, dataSize=8
> -    mmuli mmx, mmx, ufp1, size=2, ext=(0x2 | 0x4 | 0x8)
> +    mmuli mmx, mmx, ufp1, size=2, ext = "0x2 | 0x4 |" + MultHi
>  };
>  
>  def macroop PMULHUW_MMX_MMX {
> -    mmuli mmx, mmx, mmxm, size=2, ext=8
> +    mmuli mmx, mmx, mmxm, size=2, ext = MultHi
>  };
>  
>  def macroop PMULHUW_MMX_M {
>      ldfp ufp1, seg, sib, disp, dataSize=8
> -    mmuli mmx, mmx, ufp1, size=2, ext=8
> +    mmuli mmx, mmx, ufp1, size=2, ext = MultHi
>  };
>  
>  def macroop PMULHUW_MMX_P {
>      rdip t7
>      ldfp ufp1, seg, riprel, disp, dataSize=8
> -    mmuli mmx, mmx, ufp1, size=2, ext=8
> +    mmuli mmx, mmx, ufp1, size=2, ext = MultHi
>  };
>  
>  def macroop PMULUDQ_MMX_MMX {
> diff -r 36131e4dfb6e -r 335f8b406bb9 src/arch/x86/isa/microasm.isa
> --- a/src/arch/x86/isa/microasm.isa   Sat Dec 19 01:47:30 2009 -0800
> +++ b/src/arch/x86/isa/microasm.isa   Sat Dec 19 01:48:07 2009 -0800
> @@ -181,7 +181,7 @@
>                  'kernel_gs_base'):
>          assembler.symbols[reg] = regIdx("MISCREG_%s" % reg.upper())
>  
> -    for flag in ('Scalar',):
> +    for flag in ('Scalar', 'MultHi'):
>          assembler.symbols[flag] = 'Media%sOp' % flag
>  
>      # Code literal which forces a default 64 bit operand size in 64 bit mode.
> diff -r 36131e4dfb6e -r 335f8b406bb9 src/arch/x86/isa/microops/mediaop.isa
> --- a/src/arch/x86/isa/microops/mediaop.isa   Sat Dec 19 01:47:30 2009 -0800
> +++ b/src/arch/x86/isa/microops/mediaop.isa   Sat Dec 19 01:48:07 2009 -0800
> @@ -1043,7 +1043,7 @@
>                  if (ext & 0x4)
>                      resBits += (ULL(1) << (destBits - 1));
>                  
> -                if (ext & 0x8)
> +                if (multHi())
>                      resBits >>= destBits;
>  
>                  int destHiIndex = (i + 1) * destBits - 1;
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