Hi, So I've written a fancy deadlock-detection algorithm hoping that it would detect deadlocks caused the l2-bus trying to access a private cache while that same private cache tried to access the l2-bus, so that I could roll back one of the calls. However I found an additional problem. It appears that the private caches call the port interface of their CPU's as well which I didn't expect to happen. What are the caches doing?
Maybe these are all harmless operations that could safely happen concurrently, if not I will have to enable every CPU to be able to roll back it's operations which is not be desirable. There might also be an outside chance that no two port calls, originating form one CPU that would eventually call the other CPU, could be executed concurrently. But this seems very unlikely. Does anyone have any ideas on how to fix this? thanks for reading, Stijn _______________________________________________ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev
