changeset 0ef205fb6d6f in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=0ef205fb6d6f
description:
ruby: Fix MOESI_hammer cache profiler calls for L2 misses
diffstat:
1 file changed, 4 insertions(+), 1 deletion(-)
src/mem/protocol/MOESI_hammer-cache.sm | 5 ++++-
diffs (28 lines):
diff -r 8b38d35e8ffc -r 0ef205fb6d6f src/mem/protocol/MOESI_hammer-cache.sm
--- a/src/mem/protocol/MOESI_hammer-cache.sm Sun Mar 21 21:22:20 2010 -0700
+++ b/src/mem/protocol/MOESI_hammer-cache.sm Sun Mar 21 21:22:20 2010 -0700
@@ -683,7 +683,8 @@
L1IcacheMemory.profileMiss(in_msg);
} else if (L1DcacheMemory.isTagPresent(address)) {
L1DcacheMemory.profileMiss(in_msg);
- } else {
+ }
+ if (L2cacheMemory.isTagPresent(address) == false) {
L2cacheMemory.profileMiss(in_msg);
}
}
@@ -724,12 +725,14 @@
transition({I, S, O, M, MM}, L2_to_L1D) {
ii_allocateL1DCacheBlock;
tt_copyFromL2toL1; // Not really needed for state I
+ uu_profileMiss;
rr_deallocateL2CacheBlock;
}
transition({I, S, O, M, MM}, L2_to_L1I) {
jj_allocateL1ICacheBlock;
tt_copyFromL2toL1; // Not really needed for state I
+ uu_profileMiss;
rr_deallocateL2CacheBlock;
}
_______________________________________________
m5-dev mailing list
[email protected]
http://m5sim.org/mailman/listinfo/m5-dev