changeset 4e24742201d7 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=4e24742201d7
description:
ruby: get "using namespace" out of headers
In addition to obvious changes, this required a slight change to the
slicc
grammar to allow types with :: in them. Otherwise slicc barfs on
std::string
which we need for the headers that slicc generates.
diffstat:
131 files changed, 550 insertions(+), 391 deletions(-)
src/cpu/rubytest/Check.cc | 4 -
src/cpu/rubytest/Check.hh | 10 +-
src/cpu/rubytest/CheckTable.cc | 2
src/cpu/rubytest/RubyTester.cc | 4 -
src/cpu/rubytest/RubyTester.hh | 15 ++--
src/mem/gems_common/Vector.hh | 3
src/mem/protocol/MESI_CMP_directory-L2cache.sm | 4 -
src/mem/protocol/MESI_SCMP_bankdirectory-L2cache.sm | 4 -
src/mem/protocol/MOESI_CMP_directory-L2cache.sm | 4 -
src/mem/protocol/MOESI_CMP_token-L2cache.sm | 2
src/mem/protocol/MSI_MOSI_CMP_directory-L1cache.sm | 2
src/mem/protocol/MSI_MOSI_CMP_directory-L2cache.sm | 4 -
src/mem/protocol/MSI_MOSI_CMP_directory-dir.sm | 4 -
src/mem/protocol/MSI_MOSI_CMP_directory-msg.sm | 4 -
src/mem/protocol/RubySlicc_Exports.sm | 2
src/mem/protocol/RubySlicc_Profiler.sm | 3
src/mem/protocol/RubySlicc_Util.sm | 2
src/mem/ruby/buffers/MessageBuffer.cc | 2
src/mem/ruby/common/Address.cc | 8 +-
src/mem/ruby/common/Address.hh | 14 +--
src/mem/ruby/common/Driver.hh | 6 +
src/mem/ruby/common/NetDest.cc | 2
src/mem/ruby/common/NetDest.hh | 18 ++---
src/mem/ruby/common/Set.cc | 2
src/mem/ruby/common/Set.hh | 10 +-
src/mem/ruby/common/SubBlock.cc | 2
src/mem/ruby/common/SubBlock.hh | 10 +-
src/mem/ruby/eventqueue/RubyEventQueue.cc | 2
src/mem/ruby/filters/AbstractBloomFilter.hh | 4 -
src/mem/ruby/filters/BlockBloomFilter.cc | 2
src/mem/ruby/filters/BlockBloomFilter.hh | 7 +
src/mem/ruby/filters/BulkBloomFilter.cc | 2
src/mem/ruby/filters/BulkBloomFilter.hh | 7 +
src/mem/ruby/filters/GenericBloomFilter.cc | 2
src/mem/ruby/filters/GenericBloomFilter.hh | 19 +++--
src/mem/ruby/filters/H3BloomFilter.cc | 2
src/mem/ruby/filters/H3BloomFilter.hh | 7 +
src/mem/ruby/filters/LSB_CountingBloomFilter.cc | 2
src/mem/ruby/filters/LSB_CountingBloomFilter.hh | 7 +
src/mem/ruby/filters/MultiBitSelBloomFilter.cc | 2
src/mem/ruby/filters/MultiBitSelBloomFilter.hh | 7 +
src/mem/ruby/filters/MultiGrainBloomFilter.cc | 2
src/mem/ruby/filters/MultiGrainBloomFilter.hh | 7 +
src/mem/ruby/filters/NonCountingBloomFilter.cc | 2
src/mem/ruby/filters/NonCountingBloomFilter.hh | 7 +
src/mem/ruby/libruby.cc | 14 ++-
src/mem/ruby/network/Network.hh | 17 ++--
src/mem/ruby/network/garnet/NetworkHeader.hh | 3
src/mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.cc | 2
src/mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.hh | 23 ++----
src/mem/ruby/network/garnet/fixed-pipeline/InputUnit_d.cc | 2
src/mem/ruby/network/garnet/fixed-pipeline/InputUnit_d.hh | 6 +
src/mem/ruby/network/garnet/fixed-pipeline/NetworkInterface_d.cc | 6 -
src/mem/ruby/network/garnet/fixed-pipeline/NetworkInterface_d.hh | 6 +
src/mem/ruby/network/garnet/fixed-pipeline/NetworkLink_d.hh | 4 -
src/mem/ruby/network/garnet/fixed-pipeline/OutputUnit_d.cc | 2
src/mem/ruby/network/garnet/fixed-pipeline/OutputUnit_d.hh | 6 +
src/mem/ruby/network/garnet/fixed-pipeline/Router_d.cc | 2
src/mem/ruby/network/garnet/fixed-pipeline/Router_d.hh | 4 -
src/mem/ruby/network/garnet/fixed-pipeline/SWallocator_d.hh | 4 -
src/mem/ruby/network/garnet/fixed-pipeline/Switch_d.hh | 4 -
src/mem/ruby/network/garnet/fixed-pipeline/VCallocator_d.hh | 7 +
src/mem/ruby/network/garnet/fixed-pipeline/VirtualChannel_d.hh | 4 -
src/mem/ruby/network/garnet/fixed-pipeline/flitBuffer_d.cc | 4 -
src/mem/ruby/network/garnet/fixed-pipeline/flitBuffer_d.hh | 19 ++---
src/mem/ruby/network/garnet/fixed-pipeline/flit_d.cc | 2
src/mem/ruby/network/garnet/fixed-pipeline/flit_d.hh | 24 ++----
src/mem/ruby/network/garnet/flexible-pipeline/GarnetNetwork.cc | 2
src/mem/ruby/network/garnet/flexible-pipeline/GarnetNetwork.hh | 23 ++----
src/mem/ruby/network/garnet/flexible-pipeline/NetworkInterface.cc | 6 -
src/mem/ruby/network/garnet/flexible-pipeline/NetworkInterface.hh | 6 +
src/mem/ruby/network/garnet/flexible-pipeline/NetworkLink.hh | 4 -
src/mem/ruby/network/garnet/flexible-pipeline/Router.cc | 2
src/mem/ruby/network/garnet/flexible-pipeline/Router.hh | 6 +
src/mem/ruby/network/garnet/flexible-pipeline/VCarbiter.hh | 4 -
src/mem/ruby/network/garnet/flexible-pipeline/flit.cc | 2
src/mem/ruby/network/garnet/flexible-pipeline/flit.hh | 20 ++---
src/mem/ruby/network/garnet/flexible-pipeline/flitBuffer.cc | 4 -
src/mem/ruby/network/garnet/flexible-pipeline/flitBuffer.hh | 19 ++---
src/mem/ruby/network/simple/PerfectSwitch.cc | 2
src/mem/ruby/network/simple/SimpleNetwork.cc | 2
src/mem/ruby/network/simple/SimpleNetwork.hh | 14 ++-
src/mem/ruby/network/simple/Switch.cc | 4 -
src/mem/ruby/network/simple/Throttle.cc | 4 -
src/mem/ruby/network/simple/Throttle.hh | 14 ++-
src/mem/ruby/network/simple/Topology.cc | 4 -
src/mem/ruby/profiler/AccessTraceForAddress.cc | 2
src/mem/ruby/profiler/AccessTraceForAddress.hh | 10 +-
src/mem/ruby/profiler/AddressProfiler.cc | 1
src/mem/ruby/profiler/AddressProfiler.hh | 12 +--
src/mem/ruby/profiler/CacheProfiler.cc | 2
src/mem/ruby/profiler/Profiler.cc | 4 -
src/mem/ruby/profiler/Profiler.hh | 36
+++++-----
src/mem/ruby/profiler/StoreTrace.cc | 2
src/mem/ruby/profiler/StoreTrace.hh | 12 +--
src/mem/ruby/recorder/CacheRecorder.cc | 2
src/mem/ruby/recorder/TraceRecord.cc | 2
src/mem/ruby/recorder/TraceRecord.hh | 10 +-
src/mem/ruby/recorder/Tracer.cc | 8 +-
src/mem/ruby/slicc_interface/AbstractCacheEntry.hh | 8 +-
src/mem/ruby/slicc_interface/AbstractController.hh | 22 +++---
src/mem/ruby/slicc_interface/AbstractEntry.hh | 10 +-
src/mem/ruby/slicc_interface/NetworkMessage.hh | 10 +-
src/mem/ruby/slicc_interface/RubySlicc_Profiler_interface.cc | 2
src/mem/ruby/slicc_interface/RubySlicc_Profiler_interface.hh | 10 +-
src/mem/ruby/system/CacheMemory.cc | 2
src/mem/ruby/system/CacheMemory.hh | 14 ++-
src/mem/ruby/system/DMASequencer.cc | 2
src/mem/ruby/system/DirectoryMemory.cc | 2
src/mem/ruby/system/DirectoryMemory.hh | 19 +++--
src/mem/ruby/system/MemoryControl.cc | 4 -
src/mem/ruby/system/MemoryControl.hh | 20 +++--
src/mem/ruby/system/PerfectCacheMemory.hh | 18 ++---
src/mem/ruby/system/PersistentTable.cc | 2
src/mem/ruby/system/PersistentTable.hh | 20 +++--
src/mem/ruby/system/RubyPort.hh | 4 -
src/mem/ruby/system/Sequencer.cc | 2
src/mem/ruby/system/Sequencer.hh | 16 ++--
src/mem/ruby/system/SparseMemory.cc | 2
src/mem/ruby/system/SparseMemory.hh | 14 ++-
src/mem/ruby/system/System.cc | 2
src/mem/ruby/system/System.hh | 18 ++---
src/mem/ruby/system/TBETable.hh | 16 ++--
src/mem/ruby/system/TimerTable.cc | 2
src/mem/ruby/system/TimerTable.hh | 19 ++---
src/mem/slicc/ast/EnumDeclAST.py | 2
src/mem/slicc/ast/LiteralExprAST.py | 2
src/mem/slicc/parser.py | 14 +++
src/mem/slicc/symbols/Func.py | 1
src/mem/slicc/symbols/StateMachine.py | 8 +-
src/mem/slicc/symbols/Type.py | 7 -
diffs (truncated from 3422 to 300 lines):
diff -r 7d6862b80049 -r 4e24742201d7 src/cpu/rubytest/Check.cc
--- a/src/cpu/rubytest/Check.cc Wed Mar 31 16:56:45 2010 -0700
+++ b/src/cpu/rubytest/Check.cc Fri Apr 02 11:20:32 2010 -0700
@@ -334,7 +334,7 @@
}
void
-Check::print(ostream& out) const
+Check::print(std::ostream& out) const
{
out << "["
<< m_address << ", value: "
@@ -342,7 +342,7 @@
<< m_status << ", initiating node: "
<< m_initiatingNode << ", store_count: "
<< m_store_count
- << "]" << flush;
+ << "]" << std::flush;
}
void
diff -r 7d6862b80049 -r 4e24742201d7 src/cpu/rubytest/Check.hh
--- a/src/cpu/rubytest/Check.hh Wed Mar 31 16:56:45 2010 -0700
+++ b/src/cpu/rubytest/Check.hh Fri Apr 02 11:20:32 2010 -0700
@@ -30,6 +30,8 @@
#ifndef __CPU_RUBYTEST_CHECK_HH__
#define __CPU_RUBYTEST_CHECK_HH__
+#include <iostream>
+
#include "cpu/rubytest/RubyTester.hh"
#include "mem/protocol/AccessModeType.hh"
#include "mem/protocol/TesterStatus.hh"
@@ -53,7 +55,7 @@
const Address& getAddress() { return m_address; }
void changeAddress(const Address& address);
- void print(ostream& out) const;
+ void print(std::ostream& out) const;
private:
void initiatePrefetch();
@@ -76,11 +78,11 @@
RubyTester* m_tester_ptr;
};
-inline ostream&
-operator<<(ostream& out, const Check& obj)
+inline std::ostream&
+operator<<(std::ostream& out, const Check& obj)
{
obj.print(out);
- out << flush;
+ out << std::flush;
return out;
}
diff -r 7d6862b80049 -r 4e24742201d7 src/cpu/rubytest/CheckTable.cc
--- a/src/cpu/rubytest/CheckTable.cc Wed Mar 31 16:56:45 2010 -0700
+++ b/src/cpu/rubytest/CheckTable.cc Fri Apr 02 11:20:32 2010 -0700
@@ -126,6 +126,6 @@
}
void
-CheckTable::print(ostream& out) const
+CheckTable::print(std::ostream& out) const
{
}
diff -r 7d6862b80049 -r 4e24742201d7 src/cpu/rubytest/RubyTester.cc
--- a/src/cpu/rubytest/RubyTester.cc Wed Mar 31 16:56:45 2010 -0700
+++ b/src/cpu/rubytest/RubyTester.cc Fri Apr 02 11:20:32 2010 -0700
@@ -183,9 +183,9 @@
}
void
-RubyTester::print(ostream& out) const
+RubyTester::print(std::ostream& out) const
{
- out << "[RubyTester]" << endl;
+ out << "[RubyTester]" << std::endl;
}
RubyTester *
diff -r 7d6862b80049 -r 4e24742201d7 src/cpu/rubytest/RubyTester.hh
--- a/src/cpu/rubytest/RubyTester.hh Wed Mar 31 16:56:45 2010 -0700
+++ b/src/cpu/rubytest/RubyTester.hh Fri Apr 02 11:20:32 2010 -0700
@@ -30,6 +30,9 @@
#ifndef __CPU_RUBYTEST_RUBYTESTER_HH__
#define __CPU_RUBYTEST_RUBYTESTER_HH__
+#include <iostream>
+#include <string>
+
#include "cpu/rubytest/CheckTable.hh"
#include "mem/mem_object.hh"
#include "mem/packet.hh"
@@ -91,11 +94,11 @@
void incrementCheckCompletions() { m_checks_completed++; }
- void printStats(ostream& out) const {}
+ void printStats(std::ostream& out) const {}
void clearStats() {}
- void printConfig(ostream& out) const {}
+ void printConfig(std::ostream& out) const {}
- void print(ostream& out) const;
+ void print(std::ostream& out) const;
protected:
class CheckStartEvent : public Event
@@ -133,11 +136,11 @@
int m_wakeup_frequency;
};
-inline ostream&
-operator<<(ostream& out, const RubyTester& obj)
+inline std::ostream&
+operator<<(std::ostream& out, const RubyTester& obj)
{
obj.print(out);
- out << flush;
+ out << std::flush;
return out;
}
diff -r 7d6862b80049 -r 4e24742201d7 src/mem/gems_common/Vector.hh
--- a/src/mem/gems_common/Vector.hh Wed Mar 31 16:56:45 2010 -0700
+++ b/src/mem/gems_common/Vector.hh Fri Apr 02 11:20:32 2010 -0700
@@ -38,6 +38,7 @@
#ifndef VECTOR_H
#define VECTOR_H
+#include <algorithm>
#include <cassert>
#include <iostream>
#include <vector>
@@ -184,7 +185,7 @@
inline
void Vector<TYPE>::sortVector()
{
- sort(&m_vec[0], &m_vec[m_size]);
+ std::sort(&m_vec[0], &m_vec[m_size]);
}
template <class TYPE>
diff -r 7d6862b80049 -r 4e24742201d7
src/mem/protocol/MESI_CMP_directory-L2cache.sm
--- a/src/mem/protocol/MESI_CMP_directory-L2cache.sm Wed Mar 31 16:56:45
2010 -0700
+++ b/src/mem/protocol/MESI_CMP_directory-L2cache.sm Fri Apr 02 11:20:32
2010 -0700
@@ -166,7 +166,7 @@
}
}
- string getCoherenceRequestTypeStr(CoherenceRequestType type) {
+ std::string getCoherenceRequestTypeStr(CoherenceRequestType type) {
return CoherenceRequestType_to_string(type);
}
@@ -203,7 +203,7 @@
return State:NP;
}
- string getStateStr(Address addr) {
+ std::string getStateStr(Address addr) {
return L2Cache_State_to_string(getState(addr));
}
diff -r 7d6862b80049 -r 4e24742201d7
src/mem/protocol/MESI_SCMP_bankdirectory-L2cache.sm
--- a/src/mem/protocol/MESI_SCMP_bankdirectory-L2cache.sm Wed Mar 31
16:56:45 2010 -0700
+++ b/src/mem/protocol/MESI_SCMP_bankdirectory-L2cache.sm Fri Apr 02
11:20:32 2010 -0700
@@ -171,7 +171,7 @@
}
}
- string getCoherenceRequestTypeStr(CoherenceRequestType type) {
+ std::string getCoherenceRequestTypeStr(CoherenceRequestType type) {
return CoherenceRequestType_to_string(type);
}
@@ -209,7 +209,7 @@
return State:NP;
}
- string getStateStr(Address addr) {
+ std::string getStateStr(Address addr) {
return L2Cache_State_to_string(getState(addr));
}
diff -r 7d6862b80049 -r 4e24742201d7
src/mem/protocol/MOESI_CMP_directory-L2cache.sm
--- a/src/mem/protocol/MOESI_CMP_directory-L2cache.sm Wed Mar 31 16:56:45
2010 -0700
+++ b/src/mem/protocol/MOESI_CMP_directory-L2cache.sm Fri Apr 02 11:20:32
2010 -0700
@@ -457,11 +457,11 @@
}
}
- string getStateStr(Address addr) {
+ std::string getStateStr(Address addr) {
return L2Cache_State_to_string(getState(addr));
}
- string getCoherenceRequestTypeStr(CoherenceRequestType type) {
+ std::string getCoherenceRequestTypeStr(CoherenceRequestType type) {
return CoherenceRequestType_to_string(type);
}
diff -r 7d6862b80049 -r 4e24742201d7 src/mem/protocol/MOESI_CMP_token-L2cache.sm
--- a/src/mem/protocol/MOESI_CMP_token-L2cache.sm Wed Mar 31 16:56:45
2010 -0700
+++ b/src/mem/protocol/MOESI_CMP_token-L2cache.sm Fri Apr 02 11:20:32
2010 -0700
@@ -183,7 +183,7 @@
}
}
- string getStateStr(Address addr) {
+ std::string getStateStr(Address addr) {
return L2Cache_State_to_string(getState(addr));
}
diff -r 7d6862b80049 -r 4e24742201d7
src/mem/protocol/MSI_MOSI_CMP_directory-L1cache.sm
--- a/src/mem/protocol/MSI_MOSI_CMP_directory-L1cache.sm Wed Mar 31
16:56:45 2010 -0700
+++ b/src/mem/protocol/MSI_MOSI_CMP_directory-L1cache.sm Fri Apr 02
11:20:32 2010 -0700
@@ -187,7 +187,7 @@
return State:NP;
}
- string getStateStr(Address addr) {
+ std::string getStateStr(Address addr) {
return L1Cache_State_to_string(getState(addr));
}
diff -r 7d6862b80049 -r 4e24742201d7
src/mem/protocol/MSI_MOSI_CMP_directory-L2cache.sm
--- a/src/mem/protocol/MSI_MOSI_CMP_directory-L2cache.sm Wed Mar 31
16:56:45 2010 -0700
+++ b/src/mem/protocol/MSI_MOSI_CMP_directory-L2cache.sm Fri Apr 02
11:20:32 2010 -0700
@@ -222,7 +222,7 @@
}
}
- string getCoherenceRequestTypeStr(CoherenceRequestType type) {
+ std::string getCoherenceRequestTypeStr(CoherenceRequestType type) {
return CoherenceRequestType_to_string(type);
}
@@ -260,7 +260,7 @@
return State:L2_NP;
}
- string getStateStr(Address addr) {
+ std::string getStateStr(Address addr) {
return L2Cache_State_to_string(getState(addr));
}
diff -r 7d6862b80049 -r 4e24742201d7
src/mem/protocol/MSI_MOSI_CMP_directory-dir.sm
--- a/src/mem/protocol/MSI_MOSI_CMP_directory-dir.sm Wed Mar 31 16:56:45
2010 -0700
+++ b/src/mem/protocol/MSI_MOSI_CMP_directory-dir.sm Fri Apr 02 11:20:32
2010 -0700
@@ -100,11 +100,11 @@
return State:NP;
}
- string getDirStateStr(Address addr) {
+ std::string getDirStateStr(Address addr) {
return Directory_State_to_string(getState(addr));
}
- string getRequestTypeStr(CoherenceRequestType type) {
+ std::string getRequestTypeStr(CoherenceRequestType type) {
return CoherenceRequestType_to_string(type);
}
diff -r 7d6862b80049 -r 4e24742201d7
src/mem/protocol/MSI_MOSI_CMP_directory-msg.sm
--- a/src/mem/protocol/MSI_MOSI_CMP_directory-msg.sm Wed Mar 31 16:56:45
2010 -0700
+++ b/src/mem/protocol/MSI_MOSI_CMP_directory-msg.sm Fri Apr 02 11:20:32
2010 -0700
@@ -69,8 +69,8 @@
DataBlock DataBlk, desc="Data for the cache line (if PUTX)";
int NumPendingExtAcks, desc="Number of acks to wait for"; // Needed
for forwarded responses only
MessageSizeType MessageSize, desc="size category of the message";
- string L1CacheStateStr, desc="describes L1 cache block state";
- string L2CacheStateStr, desc="describes L2 cache block state";
+ std::string L1CacheStateStr, desc="describes L1 cache block state";
+ std::string L2CacheStateStr, desc="describes L2 cache block state";
PrefetchBit Prefetch, desc="Is this a prefetch request";
}
diff -r 7d6862b80049 -r 4e24742201d7 src/mem/protocol/RubySlicc_Exports.sm
--- a/src/mem/protocol/RubySlicc_Exports.sm Wed Mar 31 16:56:45 2010 -0700
+++ b/src/mem/protocol/RubySlicc_Exports.sm Fri Apr 02 11:20:32 2010 -0700
@@ -35,7 +35,7 @@
// defines
external_type(int, primitive="yes", default="0");
external_type(bool, primitive="yes", default="false");
-external_type(string, primitive="yes");
+external_type(std::string, primitive="yes");
external_type(uint64, primitive="yes");
external_type(Time, primitive="yes", default="0");
external_type(Address);
diff -r 7d6862b80049 -r 4e24742201d7 src/mem/protocol/RubySlicc_Profiler.sm
--- a/src/mem/protocol/RubySlicc_Profiler.sm Wed Mar 31 16:56:45 2010 -0700
+++ b/src/mem/protocol/RubySlicc_Profiler.sm Fri Apr 02 11:20:32 2010 -0700
@@ -41,7 +41,8 @@
// used by CMP protocols
void profile_L2Cache_miss(GenericRequestType requestType, AccessModeType type,
int msgSize, PrefetchBit pfBit, NodeID l2cacheID);
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