> I'm also open to thoughts about how to handle this better in > general... I agree that scheduling things on "curTick+1" just seems > wrong, and it is confusing and a potential (and quite possibly > current) source of timing model errors, so if there's a clean and easy > way to improve it without scheduling lots of extra events then we > should consider that. Requiring every SimObject to have a clock and > every port to know the clock of its owner is one possibility; it's > rather invasive, but maybe it's a good idea anyway. Thoughts from the > peanut gallery? > Well, every Port already has a "MemObject *owner", so do people think it would it be that much of a stretch to give each MemObject (instead of SimObject) a clock member function? For something like a cache, it would be just the hitlatency but for a Bus or other objects with explicit M5 frequencies, you could just return the appropriate value.
Scheduling on the next available tick could potentially just be "curTick + owner->clock" instead of the curTick + 1. -- - Korey
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