Hi Nilay, Please excuse the slow reply. Here is my perspective of what is left to for Ruby.
Right now I have internal patches that re-enable the cache warmup tracing capability, remove recycle requests, and incorporate several other bug fixes. I plan to soon add uncacheable access support as well, because I believe that is essential for cache warmup tracing to fully support data values. I won't bore you on the specific details here, but I'm happy to go into them if you're interested. Once I find the time to clean up these patches, I'll send them out for review. I'm hoping for mid-July. Also Arka is currently working on supporting hierarchical designs, so I think we have that item covered as well. Finally, another item that we at AMD are interested in completing is reintegrating the prefetchers, though I'm not sure if that will happen soon. Therefore, the remaining items to do are as follows: - Ruby supplying data to M5 CPU models - To me this is the 500 lb Gorilla still left in the room. The key problem is that Ruby/SLICC doesn't have a good interface to support functional accesses during execution. I have some ideas of how to make them work, but I would definitely like to discuss them with the great dev community before implementing them. If you're interested, I would be happy to go into the details. - Performance fixes - The PerfectSwitch is a prime target for optimization. However, before we re-architect it, we should determine whether we want to just deprecate the simple network and use an optimized version of Garnet instead. - Consolidate under a single stats infrastructure and stats output file. ...Of course there is the Bochs work as well, but that isn't necessarily Ruby related. Others, please feel free to add to the list. Brad > -----Original Message----- > From: [email protected] [mailto:[email protected]] On > Behalf Of Nilay Vaish > Sent: Sunday, June 13, 2010 1:45 AM > To: [email protected] > Subject: [m5-dev] Ruby Todo List > > What's next on the TODO list for Ruby? > > -- > Nilay > _______________________________________________ > m5-dev mailing list > [email protected] > http://m5sim.org/mailman/listinfo/m5-dev _______________________________________________ m5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/m5-dev
