On Thu, Jul 1, 2010 at 5:18 PM, Radivoje Vasiljevic <[email protected]> wrote: > > I'm not shure if this situation can arise in x86 (it can on MIPS), but what > about case when page tabels are changed in memory and TLB has old copy? I > guess TLB doesn't snoop writes to memory where page tables reside. So, some > of (faster case) or all (simpler case) entries in TLB should be invalidated > to get fresh copy from memory.
We're assuming the OS is not broken, and it's responsible for invalidating TLB entries before it changes to virtual-to-physical mapping (which is all we care about, not the permissions, I still contend). Maybe that's not a great assumption if you're using m5 to debug the OS. If we're concerned about this, I think the right (& easiest) answer is to just bypass the TLB and always walk the page tables. Steve _______________________________________________ m5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/m5-dev
