changeset 1eb0be76e800 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=1eb0be76e800
description:
tests: update reference config.ini files for previous cset
Rename 'responder_set' to 'use_default_range'.
diffstat:
tests/long/00.gzip/ref/alpha/tru64/o3-timing/config.ini
| 4 ++--
tests/long/00.gzip/ref/alpha/tru64/simple-atomic/config.ini
| 2 +-
tests/long/00.gzip/ref/alpha/tru64/simple-timing/config.ini
| 4 ++--
tests/long/00.gzip/ref/arm/linux/simple-atomic/config.ini
| 2 +-
tests/long/00.gzip/ref/arm/linux/simple-timing/config.ini
| 4 ++--
tests/long/00.gzip/ref/sparc/linux/o3-timing/config.ini
| 4 ++--
tests/long/00.gzip/ref/sparc/linux/simple-atomic/config.ini
| 2 +-
tests/long/00.gzip/ref/sparc/linux/simple-timing/config.ini
| 4 ++--
tests/long/00.gzip/ref/x86/linux/simple-atomic/config.ini
| 2 +-
tests/long/00.gzip/ref/x86/linux/simple-timing/config.ini
| 4 ++--
tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/config.ini
| 6 +++---
tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/config.ini
| 6 +++---
tests/long/10.mcf/ref/arm/linux/simple-atomic/config.ini
| 2 +-
tests/long/10.mcf/ref/arm/linux/simple-timing/config.ini
| 4 ++--
tests/long/10.mcf/ref/sparc/linux/simple-atomic/config.ini
| 2 +-
tests/long/10.mcf/ref/sparc/linux/simple-timing/config.ini
| 4 ++--
tests/long/10.mcf/ref/x86/linux/simple-atomic/config.ini
| 2 +-
tests/long/10.mcf/ref/x86/linux/simple-timing/config.ini
| 4 ++--
tests/long/20.parser/ref/arm/linux/simple-atomic/config.ini
| 2 +-
tests/long/20.parser/ref/arm/linux/simple-timing/config.ini
| 4 ++--
tests/long/20.parser/ref/x86/linux/simple-atomic/config.ini
| 2 +-
tests/long/20.parser/ref/x86/linux/simple-timing/config.ini
| 4 ++--
tests/long/30.eon/ref/alpha/tru64/o3-timing/config.ini
| 4 ++--
tests/long/30.eon/ref/alpha/tru64/simple-atomic/config.ini
| 2 +-
tests/long/30.eon/ref/alpha/tru64/simple-timing/config.ini
| 4 ++--
tests/long/30.eon/ref/arm/linux/simple-atomic/config.ini
| 2 +-
tests/long/30.eon/ref/arm/linux/simple-timing/config.ini
| 4 ++--
tests/long/40.perlbmk/ref/alpha/tru64/o3-timing/config.ini
| 4 ++--
tests/long/40.perlbmk/ref/alpha/tru64/simple-atomic/config.ini
| 2 +-
tests/long/40.perlbmk/ref/alpha/tru64/simple-timing/config.ini
| 4 ++--
tests/long/40.perlbmk/ref/arm/linux/simple-atomic/config.ini
| 2 +-
tests/long/40.perlbmk/ref/arm/linux/simple-timing/config.ini
| 4 ++--
tests/long/50.vortex/ref/alpha/tru64/inorder-timing/config.ini
| 4 ++--
tests/long/50.vortex/ref/alpha/tru64/o3-timing/config.ini
| 4 ++--
tests/long/50.vortex/ref/alpha/tru64/simple-atomic/config.ini
| 2 +-
tests/long/50.vortex/ref/alpha/tru64/simple-timing/config.ini
| 4 ++--
tests/long/50.vortex/ref/arm/linux/simple-atomic/config.ini
| 2 +-
tests/long/50.vortex/ref/arm/linux/simple-timing/config.ini
| 4 ++--
tests/long/50.vortex/ref/sparc/linux/simple-atomic/config.ini
| 2 +-
tests/long/50.vortex/ref/sparc/linux/simple-timing/config.ini
| 4 ++--
tests/long/60.bzip2/ref/alpha/tru64/o3-timing/config.ini
| 4 ++--
tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/config.ini
| 2 +-
tests/long/60.bzip2/ref/alpha/tru64/simple-timing/config.ini
| 4 ++--
tests/long/60.bzip2/ref/arm/linux/simple-atomic/config.ini
| 2 +-
tests/long/60.bzip2/ref/arm/linux/simple-timing/config.ini
| 4 ++--
tests/long/60.bzip2/ref/x86/linux/simple-atomic/config.ini
| 2 +-
tests/long/60.bzip2/ref/x86/linux/simple-timing/config.ini
| 4 ++--
tests/long/70.twolf/ref/alpha/tru64/inorder-timing/config.ini
| 4 ++--
tests/long/70.twolf/ref/alpha/tru64/o3-timing/config.ini
| 4 ++--
tests/long/70.twolf/ref/alpha/tru64/simple-atomic/config.ini
| 2 +-
tests/long/70.twolf/ref/alpha/tru64/simple-timing/config.ini
| 4 ++--
tests/long/70.twolf/ref/arm/linux/simple-atomic/config.ini
| 2 +-
tests/long/70.twolf/ref/arm/linux/simple-timing/config.ini
| 4 ++--
tests/long/70.twolf/ref/sparc/linux/simple-atomic/config.ini
| 2 +-
tests/long/70.twolf/ref/sparc/linux/simple-timing/config.ini
| 4 ++--
tests/long/70.twolf/ref/x86/linux/simple-atomic/config.ini
| 2 +-
tests/long/70.twolf/ref/x86/linux/simple-timing/config.ini
| 4 ++--
tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/config.ini
| 4 ++--
tests/quick/00.hello/ref/alpha/linux/inorder-timing/config.ini
| 4 ++--
tests/quick/00.hello/ref/alpha/linux/o3-timing/config.ini
| 4 ++--
tests/quick/00.hello/ref/alpha/linux/simple-atomic/config.ini
| 2 +-
tests/quick/00.hello/ref/alpha/linux/simple-timing/config.ini
| 4 ++--
tests/quick/00.hello/ref/alpha/tru64/o3-timing/config.ini
| 4 ++--
tests/quick/00.hello/ref/alpha/tru64/simple-atomic/config.ini
| 2 +-
tests/quick/00.hello/ref/alpha/tru64/simple-timing/config.ini
| 4 ++--
tests/quick/00.hello/ref/arm/linux/simple-atomic/config.ini
| 2 +-
tests/quick/00.hello/ref/mips/linux/inorder-timing/config.ini
| 4 ++--
tests/quick/00.hello/ref/mips/linux/o3-timing/config.ini
| 4 ++--
tests/quick/00.hello/ref/mips/linux/simple-atomic/config.ini
| 2 +-
tests/quick/00.hello/ref/mips/linux/simple-timing/config.ini
| 4 ++--
tests/quick/00.hello/ref/power/linux/o3-timing/config.ini
| 4 ++--
tests/quick/00.hello/ref/power/linux/simple-atomic/config.ini
| 2 +-
tests/quick/00.hello/ref/sparc/linux/simple-atomic/config.ini
| 2 +-
tests/quick/00.hello/ref/sparc/linux/simple-timing/config.ini
| 4 ++--
tests/quick/00.hello/ref/x86/linux/simple-atomic/config.ini
| 2 +-
tests/quick/00.hello/ref/x86/linux/simple-timing/config.ini
| 4 ++--
tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/config.ini
| 4 ++--
tests/quick/02.insttest/ref/sparc/linux/o3-timing/config.ini
| 4 ++--
tests/quick/02.insttest/ref/sparc/linux/simple-atomic/config.ini
| 2 +-
tests/quick/02.insttest/ref/sparc/linux/simple-timing/config.ini
| 4 ++--
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini
| 6 +++---
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini
| 6 +++---
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini
| 6 +++---
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini
| 6 +++---
tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/config.ini
| 2 +-
tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.ini
| 4 ++--
tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/config.ini
| 4 ++--
tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/config.ini
| 4 ++--
tests/quick/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/config.ini
| 4 ++--
tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/config.ini
| 4 ++--
tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp-ruby/config.ini
| 2 +-
tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/config.ini
| 4 ++--
tests/quick/50.memtest/ref/alpha/linux/memtest/config.ini
| 4 ++--
tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.ini
| 8 ++++----
94 files changed, 163 insertions(+), 163 deletions(-)
diffs (truncated from 1749 to 300 lines):
diff -r 9c8fdcdae976 -r 1eb0be76e800
tests/long/00.gzip/ref/alpha/tru64/o3-timing/config.ini
--- a/tests/long/00.gzip/ref/alpha/tru64/o3-timing/config.ini Tue Aug 17
05:06:21 2010 -0700
+++ b/tests/long/00.gzip/ref/alpha/tru64/o3-timing/config.ini Tue Aug 17
05:06:22 2010 -0700
@@ -343,7 +343,7 @@
bus_id=0
clock=1000
header_cycles=1
-responder_set=false
+use_default_range=false
width=64
port=system.cpu.icache.mem_side system.cpu.dcache.mem_side
system.cpu.l2cache.cpu_side
@@ -375,7 +375,7 @@
bus_id=0
clock=1000
header_cycles=1
-responder_set=false
+use_default_range=false
width=64
port=system.physmem.port[0] system.cpu.l2cache.mem_side
diff -r 9c8fdcdae976 -r 1eb0be76e800
tests/long/00.gzip/ref/alpha/tru64/simple-atomic/config.ini
--- a/tests/long/00.gzip/ref/alpha/tru64/simple-atomic/config.ini Tue Aug
17 05:06:21 2010 -0700
+++ b/tests/long/00.gzip/ref/alpha/tru64/simple-atomic/config.ini Tue Aug
17 05:06:22 2010 -0700
@@ -74,7 +74,7 @@
bus_id=0
clock=1000
header_cycles=1
-responder_set=false
+use_default_range=false
width=64
port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
diff -r 9c8fdcdae976 -r 1eb0be76e800
tests/long/00.gzip/ref/alpha/tru64/simple-timing/config.ini
--- a/tests/long/00.gzip/ref/alpha/tru64/simple-timing/config.ini Tue Aug
17 05:06:21 2010 -0700
+++ b/tests/long/00.gzip/ref/alpha/tru64/simple-timing/config.ini Tue Aug
17 05:06:22 2010 -0700
@@ -142,7 +142,7 @@
bus_id=0
clock=1000
header_cycles=1
-responder_set=false
+use_default_range=false
width=64
port=system.cpu.icache.mem_side system.cpu.dcache.mem_side
system.cpu.l2cache.cpu_side
@@ -174,7 +174,7 @@
bus_id=0
clock=1000
header_cycles=1
-responder_set=false
+use_default_range=false
width=64
port=system.physmem.port[0] system.cpu.l2cache.mem_side
diff -r 9c8fdcdae976 -r 1eb0be76e800
tests/long/00.gzip/ref/arm/linux/simple-atomic/config.ini
--- a/tests/long/00.gzip/ref/arm/linux/simple-atomic/config.ini Tue Aug 17
05:06:21 2010 -0700
+++ b/tests/long/00.gzip/ref/arm/linux/simple-atomic/config.ini Tue Aug 17
05:06:22 2010 -0700
@@ -74,7 +74,7 @@
bus_id=0
clock=1000
header_cycles=1
-responder_set=false
+use_default_range=false
width=64
port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
diff -r 9c8fdcdae976 -r 1eb0be76e800
tests/long/00.gzip/ref/arm/linux/simple-timing/config.ini
--- a/tests/long/00.gzip/ref/arm/linux/simple-timing/config.ini Tue Aug 17
05:06:21 2010 -0700
+++ b/tests/long/00.gzip/ref/arm/linux/simple-timing/config.ini Tue Aug 17
05:06:22 2010 -0700
@@ -142,7 +142,7 @@
bus_id=0
clock=1000
header_cycles=1
-responder_set=false
+use_default_range=false
width=64
port=system.cpu.icache.mem_side system.cpu.dcache.mem_side
system.cpu.l2cache.cpu_side
@@ -174,7 +174,7 @@
bus_id=0
clock=1000
header_cycles=1
-responder_set=false
+use_default_range=false
width=64
port=system.physmem.port[0] system.cpu.l2cache.mem_side
diff -r 9c8fdcdae976 -r 1eb0be76e800
tests/long/00.gzip/ref/sparc/linux/o3-timing/config.ini
--- a/tests/long/00.gzip/ref/sparc/linux/o3-timing/config.ini Tue Aug 17
05:06:21 2010 -0700
+++ b/tests/long/00.gzip/ref/sparc/linux/o3-timing/config.ini Tue Aug 17
05:06:22 2010 -0700
@@ -343,7 +343,7 @@
bus_id=0
clock=1000
header_cycles=1
-responder_set=false
+use_default_range=false
width=64
port=system.cpu.icache.mem_side system.cpu.dcache.mem_side
system.cpu.l2cache.cpu_side
@@ -375,7 +375,7 @@
bus_id=0
clock=1000
header_cycles=1
-responder_set=false
+use_default_range=false
width=64
port=system.physmem.port[0] system.cpu.l2cache.mem_side
diff -r 9c8fdcdae976 -r 1eb0be76e800
tests/long/00.gzip/ref/sparc/linux/simple-atomic/config.ini
--- a/tests/long/00.gzip/ref/sparc/linux/simple-atomic/config.ini Tue Aug
17 05:06:21 2010 -0700
+++ b/tests/long/00.gzip/ref/sparc/linux/simple-atomic/config.ini Tue Aug
17 05:06:22 2010 -0700
@@ -74,7 +74,7 @@
bus_id=0
clock=1000
header_cycles=1
-responder_set=false
+use_default_range=false
width=64
port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
diff -r 9c8fdcdae976 -r 1eb0be76e800
tests/long/00.gzip/ref/sparc/linux/simple-timing/config.ini
--- a/tests/long/00.gzip/ref/sparc/linux/simple-timing/config.ini Tue Aug
17 05:06:21 2010 -0700
+++ b/tests/long/00.gzip/ref/sparc/linux/simple-timing/config.ini Tue Aug
17 05:06:22 2010 -0700
@@ -142,7 +142,7 @@
bus_id=0
clock=1000
header_cycles=1
-responder_set=false
+use_default_range=false
width=64
port=system.cpu.icache.mem_side system.cpu.dcache.mem_side
system.cpu.l2cache.cpu_side
@@ -174,7 +174,7 @@
bus_id=0
clock=1000
header_cycles=1
-responder_set=false
+use_default_range=false
width=64
port=system.physmem.port[0] system.cpu.l2cache.mem_side
diff -r 9c8fdcdae976 -r 1eb0be76e800
tests/long/00.gzip/ref/x86/linux/simple-atomic/config.ini
--- a/tests/long/00.gzip/ref/x86/linux/simple-atomic/config.ini Tue Aug 17
05:06:21 2010 -0700
+++ b/tests/long/00.gzip/ref/x86/linux/simple-atomic/config.ini Tue Aug 17
05:06:22 2010 -0700
@@ -74,7 +74,7 @@
bus_id=0
clock=1000
header_cycles=1
-responder_set=false
+use_default_range=false
width=64
port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
diff -r 9c8fdcdae976 -r 1eb0be76e800
tests/long/00.gzip/ref/x86/linux/simple-timing/config.ini
--- a/tests/long/00.gzip/ref/x86/linux/simple-timing/config.ini Tue Aug 17
05:06:21 2010 -0700
+++ b/tests/long/00.gzip/ref/x86/linux/simple-timing/config.ini Tue Aug 17
05:06:22 2010 -0700
@@ -142,7 +142,7 @@
bus_id=0
clock=1000
header_cycles=1
-responder_set=false
+use_default_range=false
width=64
port=system.cpu.icache.mem_side system.cpu.dcache.mem_side
system.cpu.l2cache.cpu_side
@@ -174,7 +174,7 @@
bus_id=0
clock=1000
header_cycles=1
-responder_set=false
+use_default_range=false
width=64
port=system.physmem.port[0] system.cpu.l2cache.mem_side
diff -r 9c8fdcdae976 -r 1eb0be76e800
tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/config.ini
--- a/tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/config.ini
Tue Aug 17 05:06:21 2010 -0700
+++ b/tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/config.ini
Tue Aug 17 05:06:22 2010 -0700
@@ -693,7 +693,7 @@
bus_id=0
clock=1000
header_cycles=1
-responder_set=true
+use_default_range=true
width=64
default=system.tsunami.pciconfig.pio
port=system.bridge.side_a system.tsunami.cchip.pio system.tsunami.pchip.pio
system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio
system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio
system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio
system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio
system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio
system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio
system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio
system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio
system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio
system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio
system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio
system.tsunami.ethernet.pio system.iocache.cpu_side
system.tsunami.ethernet.config system.tsunami.ethernet.dma
system.tsunami.ide.config system.tsunami.ide.dma
@@ -767,7 +767,7 @@
bus_id=1
clock=1000
header_cycles=1
-responder_set=false
+use_default_range=false
width=64
default=system.membus.badaddr_responder.pio
port=system.bridge.side_b system.physmem.port[0] system.iocache.mem_side
system.l2c.mem_side
@@ -822,7 +822,7 @@
bus_id=0
clock=1000
header_cycles=1
-responder_set=false
+use_default_range=false
width=64
port=system.l2c.cpu_side system.cpu0.icache.mem_side
system.cpu0.dcache.mem_side system.cpu1.icache.mem_side
system.cpu1.dcache.mem_side
diff -r 9c8fdcdae976 -r 1eb0be76e800
tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/config.ini
--- a/tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/config.ini Tue Aug
17 05:06:21 2010 -0700
+++ b/tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/config.ini Tue Aug
17 05:06:22 2010 -0700
@@ -388,7 +388,7 @@
bus_id=0
clock=1000
header_cycles=1
-responder_set=true
+use_default_range=true
width=64
default=system.tsunami.pciconfig.pio
port=system.bridge.side_a system.tsunami.cchip.pio system.tsunami.pchip.pio
system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio
system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio
system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio
system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio
system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio
system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio
system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio
system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio
system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio
system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio
system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio
system.tsunami.ethernet.pio system.iocache.cpu_side
system.tsunami.ethernet.config system.tsunami.ethernet.dma
system.tsunami.ide.config system.tsunami.ide.dma
@@ -462,7 +462,7 @@
bus_id=1
clock=1000
header_cycles=1
-responder_set=false
+use_default_range=false
width=64
default=system.membus.badaddr_responder.pio
port=system.bridge.side_b system.physmem.port[0] system.iocache.mem_side
system.l2c.mem_side
@@ -517,7 +517,7 @@
bus_id=0
clock=1000
header_cycles=1
-responder_set=false
+use_default_range=false
width=64
port=system.l2c.cpu_side system.cpu.icache.mem_side system.cpu.dcache.mem_side
diff -r 9c8fdcdae976 -r 1eb0be76e800
tests/long/10.mcf/ref/arm/linux/simple-atomic/config.ini
--- a/tests/long/10.mcf/ref/arm/linux/simple-atomic/config.ini Tue Aug 17
05:06:21 2010 -0700
+++ b/tests/long/10.mcf/ref/arm/linux/simple-atomic/config.ini Tue Aug 17
05:06:22 2010 -0700
@@ -74,7 +74,7 @@
bus_id=0
clock=1000
header_cycles=1
-responder_set=false
+use_default_range=false
width=64
port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
diff -r 9c8fdcdae976 -r 1eb0be76e800
tests/long/10.mcf/ref/arm/linux/simple-timing/config.ini
--- a/tests/long/10.mcf/ref/arm/linux/simple-timing/config.ini Tue Aug 17
05:06:21 2010 -0700
+++ b/tests/long/10.mcf/ref/arm/linux/simple-timing/config.ini Tue Aug 17
05:06:22 2010 -0700
@@ -142,7 +142,7 @@
bus_id=0
clock=1000
header_cycles=1
-responder_set=false
+use_default_range=false
width=64
port=system.cpu.icache.mem_side system.cpu.dcache.mem_side
system.cpu.l2cache.cpu_side
@@ -174,7 +174,7 @@
bus_id=0
clock=1000
header_cycles=1
-responder_set=false
+use_default_range=false
width=64
port=system.physmem.port[0] system.cpu.l2cache.mem_side
diff -r 9c8fdcdae976 -r 1eb0be76e800
tests/long/10.mcf/ref/sparc/linux/simple-atomic/config.ini
--- a/tests/long/10.mcf/ref/sparc/linux/simple-atomic/config.ini Tue Aug
17 05:06:21 2010 -0700
+++ b/tests/long/10.mcf/ref/sparc/linux/simple-atomic/config.ini Tue Aug
17 05:06:22 2010 -0700
@@ -74,7 +74,7 @@
bus_id=0
clock=1000
header_cycles=1
-responder_set=false
+use_default_range=false
width=64
port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
diff -r 9c8fdcdae976 -r 1eb0be76e800
tests/long/10.mcf/ref/sparc/linux/simple-timing/config.ini
--- a/tests/long/10.mcf/ref/sparc/linux/simple-timing/config.ini Tue Aug
17 05:06:21 2010 -0700
+++ b/tests/long/10.mcf/ref/sparc/linux/simple-timing/config.ini Tue Aug
17 05:06:22 2010 -0700
@@ -142,7 +142,7 @@
bus_id=0
clock=1000
header_cycles=1
-responder_set=false
+use_default_range=false
width=64
port=system.cpu.icache.mem_side system.cpu.dcache.mem_side
system.cpu.l2cache.cpu_side
@@ -174,7 +174,7 @@
bus_id=0
clock=1000
header_cycles=1
-responder_set=false
+use_default_range=false
width=64
port=system.physmem.port[0] system.cpu.l2cache.mem_side
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