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src/cpu/o3/iew_impl.hh <http://reviews.m5sim.org/r/179/#comment381> @todo is probably better since we could in theory use doxygen to help us out with these. - Nathan On 2010-08-13 10:12:56, Ali Saidi wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.m5sim.org/r/179/ > ----------------------------------------------------------- > > (Updated 2010-08-13 10:12:56) > > > Review request for Default. > > > Summary > ------- > > ARM: mark msr/mrs instructions as SerializeBefore/After > Since miscellaneous registers bypass wakeup logic, force serialization > to resolve data dependencies through them > > > Diffs > ----- > > src/arch/arm/isa/insts/misc.isa 3c48b2b3cb83 > src/cpu/base_dyn_inst_impl.hh 3c48b2b3cb83 > src/cpu/o3/iew_impl.hh 3c48b2b3cb83 > src/cpu/o3/inst_queue_impl.hh 3c48b2b3cb83 > > Diff: http://reviews.m5sim.org/r/179/diff > > > Testing > ------- > > > Thanks, > > Ali > > _______________________________________________ m5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/m5-dev
