I'm glad to see you went with the name directedtest, but weren't you going to put that and the current memtest into a common directory? Also, your config script name is still determ_test.py. Maybe directed_ruby_test.py?
Brad Beckmann wrote: > changeset fcdd99057b8a in /z/repo/m5 > details: http://repo.m5sim.org/m5?cmd=changeset;node=fcdd99057b8a > description: > ruby: Resurrected Ruby's deterministic tests > > Added the request series and invalidate deterministic tests as new cpu > models > and removed the no longer needed ruby tests > > diffstat: > > configs/example/determ_test.py | 126 +++++++++++++ > src/cpu/directedtest/DirectedGenerator.cc | 44 ++++ > src/cpu/directedtest/DirectedGenerator.hh | 56 +++++ > src/cpu/directedtest/InvalidateGenerator.cc | 142 ++++++++++++++ > src/cpu/directedtest/InvalidateGenerator.hh | 63 ++++++ > src/cpu/directedtest/RubyDirectedTester.cc | 136 ++++++++++++++ > src/cpu/directedtest/RubyDirectedTester.hh | 118 ++++++++++++ > src/cpu/directedtest/RubyDirectedTester.py | 52 +++++ > src/cpu/directedtest/SConscript | 48 +++++ > src/cpu/directedtest/SeriesRequestGenerator.cc | 114 +++++++++++ > src/cpu/directedtest/SeriesRequestGenerator.hh | 63 ++++++ > src/mem/protocol/RubySlicc_Exports.sm | 45 +--- > src/mem/ruby/tester/DetermGETXGenerator.cc | 176 ------------------ > src/mem/ruby/tester/DetermGETXGenerator.hh | 105 ---------- > src/mem/ruby/tester/DetermInvGenerator.cc | 220 > ----------------------- > src/mem/ruby/tester/DetermInvGenerator.hh | 105 ---------- > src/mem/ruby/tester/DetermSeriesGETSGenerator.cc | 150 --------------- > src/mem/ruby/tester/DetermSeriesGETSGenerator.hh | 102 ---------- > src/mem/ruby/tester/SConscript | 4 - > 19 files changed, 971 insertions(+), 898 deletions(-) > > diffs (truncated from 1960 to 300 lines): > > diff -r 2e4786ed3f90 -r fcdd99057b8a configs/example/determ_test.py > --- /dev/null Thu Jan 01 00:00:00 1970 +0000 > +++ b/configs/example/determ_test.py Fri Aug 20 11:46:13 2010 -0700 > @@ -0,0 +1,126 @@ > +# Copyright (c) 2006-2007 The Regents of The University of Michigan > +# Copyright (c) 2009 Advanced Micro Devices, Inc. > +# All rights reserved. > +# > +# Redistribution and use in source and binary forms, with or without > +# modification, are permitted provided that the following conditions are > +# met: redistributions of source code must retain the above copyright > +# notice, this list of conditions and the following disclaimer; > +# redistributions in binary form must reproduce the above copyright > +# notice, this list of conditions and the following disclaimer in the > +# documentation and/or other materials provided with the distribution; > +# neither the name of the copyright holders nor the names of its > +# contributors may be used to endorse or promote products derived from > +# this software without specific prior written permission. > +# > +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS > +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT > +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR > +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT > +# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, > +# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT > +# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, > +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY > +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT > +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE > +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. > +# > +# Authors: Ron Dreslinski > +# Brad Beckmann > + > +import m5 > +from m5.objects import * > +from m5.defines import buildEnv > +from m5.util import addToPath > +import os, optparse, sys > +addToPath('../common') > +addToPath('../ruby') > + > +import Ruby > + > +if buildEnv['FULL_SYSTEM']: > + panic("This script requires system-emulation mode (*_SE).") > + > +# Get paths we might need. It's expected this file is in m5/configs/example. > +config_path = os.path.dirname(os.path.abspath(__file__)) > +config_root = os.path.dirname(config_path) > +m5_root = os.path.dirname(config_root) > + > +parser = optparse.OptionParser() > + > +parser.add_option("-l", "--requests", metavar="N", default=100, > + help="Stop after N requests") > +parser.add_option("-f", "--wakeup_freq", metavar="N", default=10, > + help="Wakeup every N cycles") > +parser.add_option("--test-type", type="string", default="SeriesGetx", > + help="SeriesGetx|SeriesGets|Invalidate") > + > +# > +# Add the ruby specific and protocol specific options > +# > +Ruby.define_options(parser) > + > +execfile(os.path.join(config_root, "common", "Options.py")) > + > +(options, args) = parser.parse_args() > + > +if args: > + print "Error: script doesn't take any positional arguments" > + sys.exit(1) > + > +# > +# Select the directed generator > +# > +if options.test_type == "SeriesGetx": > + generator = SeriesRequestGenerator(num_cpus = options.num_cpus, > + issue_writes = True) > +elif options.test_type == "SeriesGets": > + generator = SeriesRequestGenerator(num_cpus = options.num_cpus, > + issue_writes = False) > +elif options.test_type == "Invalidate": > + generator = InvalidateGenerator(num_cpus = options.num_cpus) > +else: > + print "Error: unknown directed generator" > + sys.exit(1) > + > +# > +# Create the M5 system. Note that the PhysicalMemory Object isn't > +# actually used by the rubytester, but is included to support the > +# M5 memory size == Ruby memory size checks > +# > +system = System(physmem = PhysicalMemory()) > + > +# > +# Create the ruby random tester > +# > +system.tester = RubyDirectedTester(requests_to_complete = \ > + options.requests, > + generator = generator) > + > +system.ruby = Ruby.create_system(options, system) > + > +assert(options.num_cpus == len(system.ruby.cpu_ruby_ports)) > + > +for ruby_port in system.ruby.cpu_ruby_ports: > + # > + # Tie the ruby tester ports to the ruby cpu ports > + # > + system.tester.cpuPort = ruby_port.port > + > +# ----------------------- > +# run simulation > +# ----------------------- > + > +root = Root( system = system ) > +root.system.mem_mode = 'timing' > + > +# Not much point in this being higher than the L1 latency > +m5.ticks.setGlobalFrequency('1ns') > + > +# instantiate configuration > +m5.instantiate() > + > +# simulate until program terminates > +exit_event = m5.simulate(options.maxtick) > + > +print 'Exiting @ tick', m5.curTick(), 'because', exit_event.getCause() > diff -r 2e4786ed3f90 -r fcdd99057b8a src/cpu/directedtest/DirectedGenerator.cc > --- /dev/null Thu Jan 01 00:00:00 1970 +0000 > +++ b/src/cpu/directedtest/DirectedGenerator.cc Fri Aug 20 11:46:13 > 2010 -0700 > @@ -0,0 +1,44 @@ > +/* > + * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood > + * Copyright (c) 2009-2010 Advanced Micro Devices, Inc. > + * All rights reserved. > + * > + * Redistribution and use in source and binary forms, with or without > + * modification, are permitted provided that the following conditions are > + * met: redistributions of source code must retain the above copyright > + * notice, this list of conditions and the following disclaimer; > + * redistributions in binary form must reproduce the above copyright > + * notice, this list of conditions and the following disclaimer in the > + * documentation and/or other materials provided with the distribution; > + * neither the name of the copyright holders nor the names of its > + * contributors may be used to endorse or promote products derived from > + * this software without specific prior written permission. > + * > + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS > + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT > + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR > + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT > + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, > + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT > + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, > + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY > + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT > + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE > + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. > + */ > + > +#include "cpu/directedtest/DirectedGenerator.hh" > + > +DirectedGenerator::DirectedGenerator(const Params *p) > + : SimObject(p) > +{ > + m_num_cpus = p->num_cpus; > + m_directed_tester = NULL; > +} > + > +void > +DirectedGenerator::setDirectedTester(RubyDirectedTester* directed_tester) > +{ > + assert(m_directed_tester == NULL); > + m_directed_tester = directed_tester; > +} > diff -r 2e4786ed3f90 -r fcdd99057b8a src/cpu/directedtest/DirectedGenerator.hh > --- /dev/null Thu Jan 01 00:00:00 1970 +0000 > +++ b/src/cpu/directedtest/DirectedGenerator.hh Fri Aug 20 11:46:13 > 2010 -0700 > @@ -0,0 +1,56 @@ > +/* > + * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood > + * All rights reserved. > + * > + * Redistribution and use in source and binary forms, with or without > + * modification, are permitted provided that the following conditions are > + * met: redistributions of source code must retain the above copyright > + * notice, this list of conditions and the following disclaimer; > + * redistributions in binary form must reproduce the above copyright > + * notice, this list of conditions and the following disclaimer in the > + * documentation and/or other materials provided with the distribution; > + * neither the name of the copyright holders nor the names of its > + * contributors may be used to endorse or promote products derived from > + * this software without specific prior written permission. > + * > + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS > + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT > + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR > + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT > + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, > + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT > + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, > + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY > + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT > + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE > + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. > + */ > + > +#ifndef __CPU_DIRECTEDTEST_DIRECTEDGENERATOR_HH__ > +#define __CPU_DIRECTEDTEST_DIRECTEDGENERATOR_HH__ > + > +#include "cpu/directedtest/DirectedGenerator.hh" > +#include "cpu/directedtest/RubyDirectedTester.hh" > +#include "params/DirectedGenerator.hh" > +#include "sim/sim_object.hh" > + > +class DirectedGenerator : public SimObject > +{ > + public: > + typedef DirectedGeneratorParams Params; > + DirectedGenerator(const Params *p); > + > + virtual ~DirectedGenerator() {} > + > + virtual bool initiate() = 0; > + virtual void performCallback(uint proc, Addr address) = 0; > + > + void setDirectedTester(RubyDirectedTester* directed_tester); > + > + protected: > + int m_num_cpus; > + RubyDirectedTester* m_directed_tester; > +}; > + > +#endif //__CPU_DIRECTEDTEST_DIRECTEDGENERATOR_HH__ > + > diff -r 2e4786ed3f90 -r fcdd99057b8a > src/cpu/directedtest/InvalidateGenerator.cc > --- /dev/null Thu Jan 01 00:00:00 1970 +0000 > +++ b/src/cpu/directedtest/InvalidateGenerator.cc Fri Aug 20 11:46:13 > 2010 -0700 > @@ -0,0 +1,142 @@ > +/* > + * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood > + * Copyright (c) 2009-2010 Advanced Micro Devices, Inc. > + * All rights reserved. > + * > + * Redistribution and use in source and binary forms, with or without > + * modification, are permitted provided that the following conditions are > + * met: redistributions of source code must retain the above copyright > + * notice, this list of conditions and the following disclaimer; > + * redistributions in binary form must reproduce the above copyright > + * notice, this list of conditions and the following disclaimer in the > + * documentation and/or other materials provided with the distribution; > + * neither the name of the copyright holders nor the names of its > + * contributors may be used to endorse or promote products derived from > + * this software without specific prior written permission. > + * > + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS > + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT > + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR > + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT > + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, > + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT > + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, > + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY > + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT > + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE > + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. > + */ > + > +#include "cpu/directedtest/RubyDirectedTester.hh" > +#include "cpu/directedtest/DirectedGenerator.hh" > +#include "cpu/directedtest/InvalidateGenerator.hh" > + > +InvalidateGenerator::InvalidateGenerator(const Params *p) > + : DirectedGenerator(p) > +{ > + // > + // First, issue loads to bring the block into S state > + // > + m_status = InvalidateGeneratorStatus_Load_Waiting; > + m_active_read_node = 0; > + m_active_inv_node = 0; > + m_address = 0x0; > + m_addr_increment_size = p->addr_increment_size; > +} > + > +InvalidateGenerator::~InvalidateGenerator() > +{ > +} > + > +bool > +InvalidateGenerator::initiate() > +{ > + RubyDirectedTester::CpuPort* port; > + Request::Flags flags; > + PacketPtr pkt; > + Packet::Command cmd; > + > _______________________________________________ > m5-dev mailing list > [email protected] > http://m5sim.org/mailman/listinfo/m5-dev > _______________________________________________ m5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/m5-dev
