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Review request for Default. Summary ------- X86: Mark serializing macroops and regular instructions as such. Diffs ----- src/arch/x86/isa/formats/cpuid.isa 405f840c4ae1 src/arch/x86/isa/insts/general_purpose/control_transfer/interrupts_and_exceptions.py 405f840c4ae1 src/arch/x86/isa/insts/general_purpose/data_transfer/move.py 405f840c4ae1 src/arch/x86/isa/insts/system/invlpg.py 405f840c4ae1 src/arch/x86/isa/insts/system/msrs.py 405f840c4ae1 src/arch/x86/isa/insts/system/segmentation.py 405f840c4ae1 Diff: http://reviews.m5sim.org/r/207/diff Testing ------- Thanks, Gabe _______________________________________________ m5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/m5-dev
