> On 2010-08-23 10:56:55, Gabe Black wrote: > > How about using the IsSerializing/IsSerializeAfter flags? I think that's a > > little different where code is fetched but stopped from going through > > decode, maybe, so those might not work. Otherwise the code looks fine. The > > first summary line is too long and gets cut off. > > Ali Saidi wrote: > Tried that first, but it doesn't work. The serializing flags stall the > processor until all instructions ahead have been committed, but that says > nothing about the store buffer state. The stores (to the instruction stream), > were sitting in the store buffer and hadn't actually made it on the "bus" > yet. I think this does a pretty realistic thing when a complete flush needs > to happen.
I believe that. I may need to do something similar in x86 then, too. - Gabe ----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/230/#review307 ----------------------------------------------------------- On 2010-08-23 09:35:07, Ali Saidi wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.m5sim.org/r/230/ > ----------------------------------------------------------- > > (Updated 2010-08-23 09:35:07) > > > Review request for Default. > > > Summary > ------- > > ARM: Adding a bogus fault that does nothing. This fault can used to flush the > pipe, > not including the faulting instruction. > > The particular case I needed this was for a self-modifying code. It needed to > drain the store queue and force the following instruction to refetch from > icache. DCCMVAC cp15 mcr instruction is modified to raise this fault. > > > Diffs > ----- > > src/arch/arm/faults.hh 47d9409b2b7f > src/arch/arm/faults.cc 47d9409b2b7f > src/arch/arm/isa/formats/misc.isa 47d9409b2b7f > src/arch/arm/isa/formats/unimp.isa 47d9409b2b7f > > Diff: http://reviews.m5sim.org/r/230/diff > > > Testing > ------- > > > Thanks, > > Ali > > _______________________________________________ m5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/m5-dev
