changeset 0f0c231e3e97 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=0f0c231e3e97
description:
        X86: Create a directory for files that define register indexes.

        This is to help tidy up arch/x86. These files should not be used 
external to
        the ISA.

diffstat:

 src/arch/x86/apicregs.hh           |  107 ----
 src/arch/x86/emulenv.hh            |    4 +-
 src/arch/x86/floatregs.hh          |  155 ------
 src/arch/x86/insts/microfpop.cc    |    2 +-
 src/arch/x86/insts/micromediaop.cc |    2 +-
 src/arch/x86/insts/microop.cc      |    2 +-
 src/arch/x86/insts/microregop.cc   |    2 +-
 src/arch/x86/insts/static_inst.cc  |    2 +-
 src/arch/x86/interrupts.cc         |    2 +-
 src/arch/x86/interrupts.hh         |    2 +-
 src/arch/x86/intregs.hh            |  183 -------
 src/arch/x86/isa.hh                |    4 +-
 src/arch/x86/isa/includes.isa      |    8 +-
 src/arch/x86/linux/syscalls.cc     |    2 +-
 src/arch/x86/linux/system.cc       |    2 +-
 src/arch/x86/miscregs.hh           |  920 -------------------------------------
 src/arch/x86/mmaped_ipr.hh         |    2 +-
 src/arch/x86/nativetrace.cc        |    4 +-
 src/arch/x86/predecoder.cc         |    2 +-
 src/arch/x86/predecoder.hh         |    2 +-
 src/arch/x86/process.cc            |    4 +-
 src/arch/x86/registers.hh          |    4 +-
 src/arch/x86/regs/apic.hh          |  107 ++++
 src/arch/x86/regs/float.hh         |  155 ++++++
 src/arch/x86/regs/int.hh           |  183 +++++++
 src/arch/x86/regs/misc.hh          |  920 +++++++++++++++++++++++++++++++++++++
 src/arch/x86/regs/segment.hh       |   68 ++
 src/arch/x86/segmentregs.hh        |   68 --
 src/arch/x86/system.cc             |    2 +-
 src/arch/x86/tlb.cc                |    2 +-
 src/arch/x86/tlb.hh                |    2 +-
 src/arch/x86/utility.cc            |    6 +-
 src/arch/x86/utility.hh            |    2 +-
 33 files changed, 1466 insertions(+), 1466 deletions(-)

diffs (truncated from 3221 to 300 lines):

diff -r d9b98534a872 -r 0f0c231e3e97 src/arch/x86/apicregs.hh
--- a/src/arch/x86/apicregs.hh  Mon Aug 23 16:14:23 2010 -0700
+++ /dev/null   Thu Jan 01 00:00:00 1970 +0000
@@ -1,107 +0,0 @@
-/*
- * Copyright (c) 2008 The Regents of The University of Michigan
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Authors: Gabe Black
- */
-
-#ifndef __ARCH_X86_APICREGS_HH__
-#define __ARCH_X86_APICREGS_HH__
-
-#include "base/bitunion.hh"
-
-namespace X86ISA
-{
-    enum ApicRegIndex
-    {
-        APIC_ID,
-        APIC_VERSION,
-        APIC_TASK_PRIORITY,
-        APIC_ARBITRATION_PRIORITY,
-        APIC_PROCESSOR_PRIORITY,
-        APIC_EOI,
-        APIC_LOGICAL_DESTINATION,
-        APIC_DESTINATION_FORMAT,
-        APIC_SPURIOUS_INTERRUPT_VECTOR,
-
-        APIC_IN_SERVICE_BASE,
-
-        APIC_TRIGGER_MODE_BASE = APIC_IN_SERVICE_BASE + 16,
-
-        APIC_INTERRUPT_REQUEST_BASE = APIC_TRIGGER_MODE_BASE + 16,
-
-        APIC_ERROR_STATUS = APIC_INTERRUPT_REQUEST_BASE + 16,
-        APIC_INTERRUPT_COMMAND_LOW,
-        APIC_INTERRUPT_COMMAND_HIGH,
-        APIC_LVT_TIMER,
-        APIC_LVT_THERMAL_SENSOR,
-        APIC_LVT_PERFORMANCE_MONITORING_COUNTERS,
-        APIC_LVT_LINT0,
-        APIC_LVT_LINT1,
-        APIC_LVT_ERROR,
-        APIC_INITIAL_COUNT,
-        APIC_CURRENT_COUNT,
-        APIC_DIVIDE_CONFIGURATION,
-
-        APIC_INTERNAL_STATE,
-
-        NUM_APIC_REGS
-    };
-
-    static inline ApicRegIndex
-    APIC_IN_SERVICE(int index)
-    {
-        return (ApicRegIndex)(APIC_IN_SERVICE_BASE + index);
-    }
-
-    static inline ApicRegIndex
-    APIC_TRIGGER_MODE(int index)
-    {
-        return (ApicRegIndex)(APIC_TRIGGER_MODE_BASE + index);
-    }
-
-    static inline ApicRegIndex
-    APIC_INTERRUPT_REQUEST(int index)
-    {
-        return (ApicRegIndex)(APIC_INTERRUPT_REQUEST_BASE + index);
-    }
-
-    BitUnion32(InterruptCommandRegLow)
-        Bitfield<7, 0> vector;
-        Bitfield<10, 8> deliveryMode;
-        Bitfield<11> destMode;
-        Bitfield<12> deliveryStatus;
-        Bitfield<14> level;
-        Bitfield<15> trigger;
-        Bitfield<19, 18> destShorthand;
-    EndBitUnion(InterruptCommandRegLow)
-
-    BitUnion32(InterruptCommandRegHigh)
-        Bitfield<31, 24> destination;
-    EndBitUnion(InterruptCommandRegHigh)
-}
-
-#endif
diff -r d9b98534a872 -r 0f0c231e3e97 src/arch/x86/emulenv.hh
--- a/src/arch/x86/emulenv.hh   Mon Aug 23 16:14:23 2010 -0700
+++ b/src/arch/x86/emulenv.hh   Mon Aug 23 16:14:24 2010 -0700
@@ -40,9 +40,9 @@
 #ifndef __ARCH_X86_EMULENV_HH__
 #define __ARCH_X86_EMULENV_HH__
 
-#include "arch/x86/intregs.hh"
-#include "arch/x86/segmentregs.hh"
 #include "arch/x86/registers.hh"
+#include "arch/x86/regs/int.hh"
+#include "arch/x86/regs/segment.hh"
 #include "arch/x86/types.hh"
 
 namespace X86ISA
diff -r d9b98534a872 -r 0f0c231e3e97 src/arch/x86/floatregs.hh
--- a/src/arch/x86/floatregs.hh Mon Aug 23 16:14:23 2010 -0700
+++ /dev/null   Thu Jan 01 00:00:00 1970 +0000
@@ -1,155 +0,0 @@
-/*
- * Copyright (c) 2007 The Hewlett-Packard Development Company
- * All rights reserved.
- *
- * The license below extends only to copyright in the software and shall
- * not be construed as granting a license to any other intellectual
- * property including but not limited to intellectual property relating
- * to a hardware implementation of the functionality of the software
- * licensed hereunder.  You may use the software subject to the license
- * terms below provided that you ensure that this notice is replicated
- * unmodified and in its entirety in all distributions of the software,
- * modified or unmodified, in source code or in binary form.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Authors: Gabe Black
- */
-
-#ifndef __ARCH_X86_FLOATREGS_HH__
-#define __ARCH_X86_FLOATREGS_HH__
-
-#include "arch/x86/x86_traits.hh"
-#include "base/bitunion.hh"
-
-namespace X86ISA
-{
-    enum FloatRegIndex
-    {
-        // MMX/X87 registers
-        FLOATREG_MMX_BASE,
-        FLOATREG_FPR_BASE = FLOATREG_MMX_BASE,
-        FLOATREG_MMX0 = FLOATREG_MMX_BASE,
-        FLOATREG_MMX1,
-        FLOATREG_MMX2,
-        FLOATREG_MMX3,
-        FLOATREG_MMX4,
-        FLOATREG_MMX5,
-        FLOATREG_MMX6,
-        FLOATREG_MMX7,
-
-        FLOATREG_FPR0 = FLOATREG_FPR_BASE,
-        FLOATREG_FPR1,
-        FLOATREG_FPR2,
-        FLOATREG_FPR3,
-        FLOATREG_FPR4,
-        FLOATREG_FPR5,
-        FLOATREG_FPR6,
-        FLOATREG_FPR7,
-
-        FLOATREG_XMM_BASE = FLOATREG_MMX_BASE + NumMMXRegs,
-        FLOATREG_XMM0_LOW = FLOATREG_XMM_BASE,
-        FLOATREG_XMM0_HIGH,
-        FLOATREG_XMM1_LOW,
-        FLOATREG_XMM1_HIGH,
-        FLOATREG_XMM2_LOW,
-        FLOATREG_XMM2_HIGH,
-        FLOATREG_XMM3_LOW,
-        FLOATREG_XMM3_HIGH,
-        FLOATREG_XMM4_LOW,
-        FLOATREG_XMM4_HIGH,
-        FLOATREG_XMM5_LOW,
-        FLOATREG_XMM5_HIGH,
-        FLOATREG_XMM6_LOW,
-        FLOATREG_XMM6_HIGH,
-        FLOATREG_XMM7_LOW,
-        FLOATREG_XMM7_HIGH,
-        FLOATREG_XMM8_LOW,
-        FLOATREG_XMM8_HIGH,
-        FLOATREG_XMM9_LOW,
-        FLOATREG_XMM9_HIGH,
-        FLOATREG_XMM10_LOW,
-        FLOATREG_XMM10_HIGH,
-        FLOATREG_XMM11_LOW,
-        FLOATREG_XMM11_HIGH,
-        FLOATREG_XMM12_LOW,
-        FLOATREG_XMM12_HIGH,
-        FLOATREG_XMM13_LOW,
-        FLOATREG_XMM13_HIGH,
-        FLOATREG_XMM14_LOW,
-        FLOATREG_XMM14_HIGH,
-        FLOATREG_XMM15_LOW,
-        FLOATREG_XMM15_HIGH,
-
-        FLOATREG_MICROFP_BASE = FLOATREG_XMM_BASE + 2 * NumXMMRegs,
-        FLOATREG_MICROFP0 = FLOATREG_MICROFP_BASE,
-        FLOATREG_MICROFP1,
-        FLOATREG_MICROFP2,
-        FLOATREG_MICROFP3,
-        FLOATREG_MICROFP4,
-        FLOATREG_MICROFP5,
-        FLOATREG_MICROFP6,
-        FLOATREG_MICROFP7,
-
-        NUM_FLOATREGS = FLOATREG_MICROFP_BASE + NumMicroFpRegs
-    };
-
-    static inline FloatRegIndex
-    FLOATREG_MMX(int index)
-    {
-        return (FloatRegIndex)(FLOATREG_MMX_BASE + index);
-    }
-
-    static inline FloatRegIndex
-    FLOATREG_FPR(int index)
-    {
-        return (FloatRegIndex)(FLOATREG_FPR_BASE + index);
-    }
-
-    static inline FloatRegIndex
-    FLOATREG_XMM_LOW(int index)
-    {
-        return (FloatRegIndex)(FLOATREG_XMM_BASE + 2 * index);
-    }
-
-    static inline FloatRegIndex
-    FLOATREG_XMM_HIGH(int index)
-    {
-        return (FloatRegIndex)(FLOATREG_XMM_BASE + 2 * index + 1);
-    }
-
-    static inline FloatRegIndex
-    FLOATREG_MICROFP(int index)
-    {
-        return (FloatRegIndex)(FLOATREG_MICROFP_BASE + index);
-    }
-
-    static inline FloatRegIndex
-    FLOATREG_STACK(int index, int top)
-    {
-        return FLOATREG_FPR((top + index + 8) % 8);
-    }
-};
-
-#endif // __ARCH_X86_FLOATREGS_HH__
diff -r d9b98534a872 -r 0f0c231e3e97 src/arch/x86/insts/microfpop.cc
--- a/src/arch/x86/insts/microfpop.cc   Mon Aug 23 16:14:23 2010 -0700
+++ b/src/arch/x86/insts/microfpop.cc   Mon Aug 23 16:14:24 2010 -0700
@@ -38,7 +38,7 @@
  */
 
 #include "arch/x86/insts/microfpop.hh"
-#include "arch/x86/miscregs.hh"
+#include "arch/x86/regs/misc.hh"
 #include <string>
 
 namespace X86ISA
diff -r d9b98534a872 -r 0f0c231e3e97 src/arch/x86/insts/micromediaop.cc
--- a/src/arch/x86/insts/micromediaop.cc        Mon Aug 23 16:14:23 2010 -0700
+++ b/src/arch/x86/insts/micromediaop.cc        Mon Aug 23 16:14:24 2010 -0700
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